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1.
公开(公告)号:US09576935B2
公开(公告)日:2017-02-21
申请号:US14254214
申请日:2014-04-16
IPC分类号: H01L23/48 , H01L25/065 , H01L25/00 , H01L21/56 , H01L23/31 , H01L23/495
CPC分类号: H01L25/0657 , H01L21/56 , H01L23/3121 , H01L23/49541 , H01L23/49548 , H01L25/0655 , H01L25/50 , H01L2924/0002 , H01L2924/00
摘要: A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.
摘要翻译: 一种制造半导体封装的方法包括提供具有孔径的第一衬底,提供第一半导体芯片,将第一半导体芯片连接到第一衬底,用第一绝缘材料填充孔,并用半导体芯片封装第二绝缘材料 创建第一个封装体。
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公开(公告)号:US20160126227A1
公开(公告)日:2016-05-05
申请号:US14926892
申请日:2015-10-29
CPC分类号: H01L25/16 , H01L21/02164 , H01L21/022 , H01L21/02266 , H01L21/78 , H01L23/485 , H01L23/49562 , H01L23/49575 , H01L24/20 , H01L24/24 , H01L24/27 , H01L24/32 , H01L24/83 , H01L24/94 , H01L25/04 , H01L25/072 , H01L25/50 , H01L2224/04105 , H01L2224/273 , H01L2224/274 , H01L2224/291 , H01L2224/3201 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/83801 , H01L2224/92244 , H01L2224/94 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1431 , H01L2924/1461 , H01L2924/206 , H01L2924/2064 , H01L2224/27 , H01L2924/014 , H01L2924/00014
摘要: A method for fabricating an electronic device includes providing a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first semiconductor die and a first solder interconnect layer applied to a main face of the first semiconductor die. The second semiconductor chip has a second semiconductor die, an insulating layer applied to a main face of the second semiconductor die, and a second solder interconnect layer applied to the insulating layer. The method further includes attaching the first semiconductor chip with the first solder interconnect layer to a first carrier and attaching the second semiconductor chip with the second solder interconnect layer to a second carrier.
摘要翻译: 一种制造电子器件的方法包括提供第一半导体芯片和第二半导体芯片。 第一半导体芯片具有施加到第一半导体管芯的主面的第一半导体管芯和第一焊料互连层。 第二半导体芯片具有第二半导体管芯,施加到第二半导体管芯的主面的绝缘层和施加到绝缘层的第二焊料互连层。 该方法还包括将具有第一焊料互连层的第一半导体芯片附接到第一载体并且将第二半导体芯片与第二焊料互连层附接到第二载体。
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公开(公告)号:US20200020607A1
公开(公告)日:2020-01-16
申请号:US16504692
申请日:2019-07-08
发明人: Syahir Abd Hamid , Jagen Krishnan , Mian Mian Lam , Jayaganasan Narayanasamy , Fabian Schnoy , Thomas Stoek , Christian Stuempfl
IPC分类号: H01L23/373 , H01L23/495 , H01L23/31 , H01L23/367 , H01L21/56 , H01L21/48
摘要: A method of forming a semiconductor device includes providing a semiconductor package comprising an electrically insulating mold compound body, a semiconductor die that is encapsulated by the mold compound body, a plurality of electrically conductive leads that each protrude out of the mold compound body, and a metal heat slug, the metal heat slug comprising a rear surface that is exposed from the mold compound body, coating outer portions of the leads that are exposed from the mold compound body with a metal coating, and after completing the coating of the outer portions of the leads, providing a planar metallic heat sink interface surface on the semiconductor device which is exposed from the mold compound body, and substantially devoid of the metal coating.
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4.
公开(公告)号:US20150303135A1
公开(公告)日:2015-10-22
申请号:US14254214
申请日:2014-04-16
IPC分类号: H01L23/495 , H01L25/065 , H01L23/31 , H01L23/29 , H01L25/00 , H01L21/56
CPC分类号: H01L25/0657 , H01L21/56 , H01L23/3121 , H01L23/49541 , H01L23/49548 , H01L25/0655 , H01L25/50 , H01L2924/0002 , H01L2924/00
摘要: A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.
摘要翻译: 一种制造半导体封装的方法包括提供具有孔径的第一衬底,提供第一半导体芯片,将第一半导体芯片连接到第一衬底,用第一绝缘材料填充孔,并用半导体芯片封装第二绝缘材料 创建第一个封装体。
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公开(公告)号:US09881909B2
公开(公告)日:2018-01-30
申请号:US14926892
申请日:2015-10-29
IPC分类号: H01L21/4763 , H01L25/16 , H01L23/485 , H01L21/02 , H01L21/78 , H01L25/00 , H01L25/04 , H01L23/00
CPC分类号: H01L25/16 , H01L21/02164 , H01L21/022 , H01L21/02266 , H01L21/78 , H01L23/485 , H01L23/49562 , H01L23/49575 , H01L24/20 , H01L24/24 , H01L24/27 , H01L24/32 , H01L24/83 , H01L24/94 , H01L25/04 , H01L25/072 , H01L25/50 , H01L2224/04105 , H01L2224/273 , H01L2224/274 , H01L2224/291 , H01L2224/3201 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/83801 , H01L2224/92244 , H01L2224/94 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1431 , H01L2924/1461 , H01L2924/206 , H01L2924/2064 , H01L2224/27 , H01L2924/014 , H01L2924/00014
摘要: A method for fabricating an electronic device includes providing a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first semiconductor die and a first solder interconnect layer applied to a main face of the first semiconductor die. The second semiconductor chip has a second semiconductor die, an insulating layer applied to a main face of the second semiconductor die, and a second solder interconnect layer applied to the insulating layer. The method further includes attaching the first semiconductor chip with the first solder interconnect layer to a first carrier and attaching the second semiconductor chip with the second solder interconnect layer to a second carrier.
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公开(公告)号:US10651109B2
公开(公告)日:2020-05-12
申请号:US16504692
申请日:2019-07-08
发明人: Syahir Abd Hamid , Jagen Krishnan , Mian Mian Lam , Jayaganasan Narayanasamy , Fabian Schnoy , Thomas Stoek , Christian Stuempfl
IPC分类号: H01L23/373 , H01L23/495 , H01L21/48 , H01L23/367 , H01L21/56 , H01L23/31
摘要: A method of forming a semiconductor device includes providing a semiconductor package comprising an electrically insulating mold compound body, a semiconductor die that is encapsulated by the mold compound body, a plurality of electrically conductive leads that each protrude out of the mold compound body, and a metal heat slug, the metal heat slug comprising a rear surface that is exposed from the mold compound body, coating outer portions of the leads that are exposed from the mold compound body with a metal coating, and after completing the coating of the outer portions of the leads, providing a planar metallic heat sink interface surface on the semiconductor device which is exposed from the mold compound body, and substantially devoid of the metal coating.
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