公开(公告)号：US20220254713A1

公开(公告)日：2022-08-11

申请号：US17173863

申请日：2021-02-11

申请人： Infineon Technologies AG

发明人： Markus Zundel ,  Sergey Ananiev ,  Andreas Behrendt ,  Holger Doepke ,  Uwe Schmalzbauer ,  Michael Sorger ,  Dominic Thurmer

IPC分类号： H01L23/528 ,  H01L23/532 ,  H01L21/768

摘要： A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.

公开(公告)号：US20180061742A1

公开(公告)日：2018-03-01

申请号：US15685880

申请日：2017-08-24

申请人： Infineon Technologies AG

发明人： Sergey Ananiev ,  Robert Bauer ,  Heinrich Koerner ,  Yik Yee Tan ,  Juergen Walter

IPC分类号： H01L23/488 ,  H01L23/00

CPC分类号： H01L23/488 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05166 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13101 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/484 ,  H01L2224/48507 ,  H01L2224/48824 ,  H01L2224/85365 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device includes an electrically conductive contact pad structure. Moreover, the semiconductor device includes a bond structure. The bond structure is in contact with the electrically conductive contact pad structure at least at an enclosed interface region. Additionally, the semiconductor device includes a degradation prevention structure laterally surrounding the enclosed interface region. The degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.

公开(公告)号：US20200294877A1

公开(公告)日：2020-09-17

申请号：US16355245

申请日：2019-03-15

申请人： Infineon Technologies AG

发明人： Valerie Vivares ,  Sergey Ananiev

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  B29C70/68

摘要： A molded semiconductor package includes a semiconductor die embedded in a mold compound, and a plurality of metal leads embedded in the mold compound and electrically connected to the semiconductor die. A first plurality of features is formed in an exterior surface of the mold compound. The first plurality of features disrupts a planarity of the exterior surface of the mold compound and is arranged along a direction which is transverse to a lengthwise extension of the plurality of metal leads. Corresponding methods of manufacturing such a molded semiconductor package are also described.

公开(公告)号：US20220270985A1

公开(公告)日：2022-08-25

申请号：US17582285

申请日：2022-01-24

申请人： Infineon Technologies AG

发明人： Sergey Ananiev ,  Andreas Bauer ,  Michael Goroll ,  Maria Heidenblut ,  Stefan Kaiser ,  Gunther Mackh ,  Kabula Mutamba ,  Reinhard Pufall ,  Georg Reuther

IPC分类号： H01L23/00

摘要： A semiconductor chip having a crack stop structure is disclosed. The crack stop structure includes one or more recesses formed in the semiconductor chip. The one or more recesses extend adjacent to and along a periphery of the semiconductor chip. The one or more recesses are filled with a metal material. The metal material has an intrinsic tensile stress at room temperature that induces compressive stress in at least a region of the periphery of the semiconductor chip.

公开(公告)号：US09293400B2

公开(公告)日：2016-03-22

申请号：US14590021

申请日：2015-01-06

申请人： Infineon Technologies AG

发明人： Sergey Ananiev

IPC分类号： H01L23/495 ,  H01L25/065 ,  H01L23/00 ,  H01L23/13 ,  H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H05K3/34

CPC分类号： H01L23/49575 ,  H01L23/3121 ,  H01L23/49555 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L2224/32013 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/181 ,  H05K3/3426 ,  H05K2201/10757 ,  H05K2201/10765 ,  H05K2201/10772 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： A package (120), wherein the package (120) has at least one electronic chip (124), an encapsulation body (138) that encapsulates the electronic chip(s) (124), and a plurality of terminal pins (122) to connect the electronic chip(s) (124), wherein each of the said terminal pins (122) has an encapsulated section (126), which is encapsulated at least partially by the encapsulation body (138) and has an exposed section (128) that protrudes from the encapsulation body (138), and wherein at least a portion of the exposed sections (128) laterally extends from the encapsulation body (138) up to a reversal point (130) and laterally extends back from the reversal point (130) to the encapsulation body (138), so that a free end (132) of the exposed sections (128) is laterally aligned with or to a corresponding side wall (134) of the encapsulation body (138) or is spaced from the corresponding side wall (134) of the encapsulation body (138) laterally outwardly.