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公开(公告)号:US09576933B1
公开(公告)日:2017-02-21
申请号:US14989782
申请日:2016-01-06
发明人: Yi-Jen Lo
IPC分类号: H01L23/48 , H01L25/065 , H01L23/31 , H01L23/485 , H01L23/00 , H01L49/02
CPC分类号: H01L25/0655 , H01L21/561 , H01L21/568 , H01L23/295 , H01L23/481 , H01L23/485 , H01L24/19 , H01L24/20 , H01L28/75 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/24137 , H01L2224/92125 , H01L2224/92144 , H01L2224/97 , H01L2924/15311 , H01L2924/18161 , H01L2924/18162 , H01L2224/83005
摘要: A fan-out wafer-level-package (FOWLP) is provided. The FOWLP includes a redistribution layer (RDL) comprising a dielectric layer and a first metal layer; a passive device in the first metal layer; a first passivation layer covering a top surface of the RDL; a second passivation layer covering a bottom surface of the RDL; a chip mounted on the first passivation layer; a molding compound around the chip and on the first passivation layer; a via opening penetrating through the second passivation layer, the dielectric layer, and the second passivation layer, thereby exposing a terminal of the chip; a contact opening in the second passivation layer; and a second metal layer in the via opening and the contact opening to electrically connect one electrode of the passive device with the terminal of the chip.
摘要翻译: 提供扇形晶圆级封装(FOWLP)。 FOWLP包括包含电介质层和第一金属层的再分布层(RDL); 第一金属层中的无源器件; 覆盖RDL的顶表面的第一钝化层; 覆盖RDL的底表面的第二钝化层; 安装在所述第一钝化层上的芯片; 围绕芯片和第一钝化层的模塑料; 穿过所述第二钝化层,所述介电层和所述第二钝化层的通孔,从而使所述芯片的端子露出; 在第二钝化层中的接触开口; 以及通孔开口中的第二金属层和接触开口,以将无源器件的一个电极与芯片的端子电连接。
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公开(公告)号:US09543270B1
公开(公告)日:2017-01-10
申请号:US14814524
申请日:2015-07-31
发明人: Shih-Fan Kuan , Yi-Jen Lo
IPC分类号: H01L25/04 , H01L25/065 , H01L23/00 , H01L23/538 , H01L23/31 , H01L23/522 , H01L25/00 , H01L21/52 , H01L21/56 , H01L21/768 , H01L21/8234
CPC分类号: H01L23/5386 , H01L21/52 , H01L21/561 , H01L21/6835 , H01L21/6836 , H01L21/823475 , H01L23/3114 , H01L23/481 , H01L23/49816 , H01L23/522 , H01L23/525 , H01L23/5384 , H01L23/562 , H01L24/03 , H01L24/09 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02317 , H01L2224/02372 , H01L2224/02373 , H01L2224/0401 , H01L2224/08165 , H01L2224/08235 , H01L2224/08238 , H01L2224/11849 , H01L2224/13025 , H01L2224/131 , H01L2224/13111 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/17181 , H01L2224/81815 , H01L2224/9202 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2924/1434 , H01L2924/3511 , H01L2224/81 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要: A multi-device package includes a substrate, at least two device regions, a first redistribution layer, an external chip, a plurality of first connectors and a conductive contact. The two device regions are formed from the substrate, and the substrate has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface and electrically connected to the two device regions, and the external chip is disposed on the first redistribution layer. The first connectors are interposed between the first redistribution layer and the external chip to interconnect the first redistribution layer and the external chip, and the conductive contact is extended from the second surface to the first surface of the substrate to electrically connect the device region.
摘要翻译: 多器件封装包括衬底,至少两个器件区域,第一再分布层,外部芯片,多个第一连接器和导电触点。 两个器件区域由衬底形成,并且衬底具有与第一表面相对的第一表面和第二表面。 第一再分配层设置在第一表面上并电连接到两个器件区域,并且外部芯片设置在第一再分配层上。 第一连接器插入在第一再分配层和外部芯片之间以互连第一再分配层和外部芯片,并且导电接触从第二表面延伸到基板的第一表面以电连接器件区域。
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