Isolation module for use between power rails in an integrated circuit

    公开(公告)号:US10560094B2

    公开(公告)日:2020-02-11

    申请号:US15670740

    申请日:2017-08-07

    申请人: Intel Corporation

    摘要: An integrated circuit (IC) can include multiple power domains that are served by a common power source. In an example, a first IC power rail can be coupled to the source and a first consumer circuit. A second IC power rail can be coupled to a second consumer circuit. The second IC power rail can receive a filtered power signal from an isolation module that is coupled between the first and second power rails. In an example, an isolation module includes an integrated inductor and a capacitor (e.g., a land-side capacitor). The integrated inductor can optionally include multiple spaced apart conductive layers that are electrically coupled. The integrated inductor can optionally include a series of conductive traces and plated through holes or vias that together provide a current path with multiple turns.

    THERMAL MANAGEMENT SYSTEMS FOR ELECTRONIC DEVICES AND RELATED METHODS

    公开(公告)号:US20220300048A1

    公开(公告)日:2022-09-22

    申请号:US17712010

    申请日:2022-04-01

    申请人: Intel Corporation

    摘要: Thermal Management Systems for electronic devices and related methods are disclosed. An example electronic housing includes a housing defining a cavity, electronics in the cavity, and a touch display over the electronics. A heat spreader has a first surface toward the electronics and a second surface opposite the first surface toward the touch display, where the heat spreader is to dissipate heat generated by the electronics. A glass cover is coupled to the housing and has a first side toward the touch display and a second side opposite the first side, where the glass cover is exposed external to the housing. An insulation layer is between the second surface of the heat spreader and the second side of the glass cover to restrict heat transfer from the electronics to the second side of the glass cover.

    STACKED SCALABLE VOLTAGE REGULATOR MODULE FOR PLATFORM AREA MINIATURIZATION

    公开(公告)号:US20210385942A1

    公开(公告)日:2021-12-09

    申请号:US16988759

    申请日:2020-08-10

    申请人: Intel Corporation

    IPC分类号: H05K1/02 H05K1/14

    摘要: The present disclosure generally relates to a scalable computer circuit board having a first power level semiconductor package coupled to at least one base-level voltage regulator module, which is coupled to a plurality of connection receptacles that are configured for connecting with a voltage regulator module positioned on a second level, as a standardized base unit. To scale the base unit, a second power level semiconductor package may be exchanged for the first power level semiconductor package in conjunction with one or more voltage regulator module board being positioned over a corresponding number of base-level voltage regulator modules and coupled to their plurality of connection receptacles.

    Stacked scalable voltage regulator module for platform area miniaturization

    公开(公告)号:US11343906B2

    公开(公告)日:2022-05-24

    申请号:US16988759

    申请日:2020-08-10

    申请人: Intel Corporation

    IPC分类号: H05K1/02 H05K1/14

    摘要: The present disclosure generally relates to a scalable computer circuit board having a first power level semiconductor package coupled to at least one base-level voltage regulator module, which is coupled to a plurality of connection receptacles that are configured for connecting with a voltage regulator module positioned on a second level, as a standardized base unit. To scale the base unit, a second power level semiconductor package may be exchanged for the first power level semiconductor package in conjunction with one or more voltage regulator module board being positioned over a corresponding number of base-level voltage regulator modules and coupled to their plurality of connection receptacles.

    Capacitive interconnect in a semiconductor package

    公开(公告)号:US10609813B2

    公开(公告)日:2020-03-31

    申请号:US15182091

    申请日:2016-06-14

    申请人: Intel Corporation

    摘要: Capacitive interconnects and processes for fabricating the capacitive interconnects are provided. In some embodiments, the capacitive interconnect includes first metal layers, second metal layers; and dielectric layers including a dielectric layer that intercalates a first metal layer of the first metal layers and a second metal layer of the second metal layers. Such layers can be assembled in a nearly concentric arrangement, where the dielectric layer abuts the first metal layer and the second metal layer abuts the dielectric layer. In addition, the capacitive interconnect can include a first electrode electrically coupled to at least one of the first metal layers, and a second electrode electrically coupled to at least one of the second metal layers, the second electrode assembled opposite to the first electrode. The first electrode and the second electrode can include respective solder tops.