-
公开(公告)号：US11989599B2
公开(公告)日：2024-05-21
申请号：US16880277
申请日：2020-05-21
Applicant: Intel Corporation
Inventor： Mario Flajslik , James Dinan
Abstract: Systems, apparatuses and methods may provide for detecting an outbound communication and identifying a context of the outbound communication. Additionally, a completion status of the outbound communication may be tracked relative to the context. In one example, tracking the completion status includes incrementing a sent messages counter associated with the context in response to the outbound communication, detecting an acknowledgement of the outbound communication based on a network response to the outbound communication, incrementing a received acknowledgements counter associated with the context in response to the acknowledgement, comparing the sent messages counter to the received acknowledgements counter, and triggering a per-context memory ordering operation if the sent messages counter and the received acknowledgements counter have matching values.
-
公开(公告)号：US10963183B2
公开(公告)日：2021-03-30
申请号：US15463005
申请日：2017-03-20
Applicant: Intel Corporation
Inventor： James Dinan , Keith D. Underwood , Sayantan Sur , Charles A. Giefer , Mario Flajslik
Abstract: Technologies for fine-grained completion tracking of memory buffer accesses include a compute device. The compute device is to establish multiple counter pairs for a memory buffer. Each counter pair includes a locally managed offset and a completion counter. The compute device is also to receive a request from a remote compute device to access the memory buffer, assign one of the counter pairs to the request, advance the locally managed offset of the assigned counter pair by the amount of data to be read or written, and advance the completion counter of the assigned counter pair as the data is read from or written to the memory buffer. Other embodiments are also described and claimed.
-
3.发明申请
公开(公告)号：US20190097935A1
公开(公告)日：2019-03-28
申请号：US15716831
申请日：2017-09-27
Applicant: Intel Corporation
Inventor： Mario Flajslik , Eric R. Borch , Timo Schneider , Michael A. Parker
IPC: H04L12/815 , H04L12/26 , H04L12/721
Abstract: Technologies for improving throughput in a network include a node switch. The node switch is to obtain expected performance data indicative of an expected data transfer performance of the node switch. The node switch is also to obtain measured performance data indicative of a measured data transfer performance of the node switch, compare the measured performance data to the expected performance data to determine whether the measured data transfer performance satisfies the expected data transfer performance, determine, as a function of whether the measured data transfer performance satisfies the expected data transfer performance, whether to force a unit of data through a non-minimal path to a destination, and send, in response to a determination to force the unit of data to be sent through a non-minimal path, the unit of data to an output port of the node switch associated with the non-minimal path. Other embodiments are also described.
-
公开(公告)号：US20180267742A1
公开(公告)日：2018-09-20
申请号：US15463005
申请日：2017-03-20
Applicant: Intel Corporation
Inventor： James Dinan , Keith D. Underwood , Sayantan Sur , Charles A. Giefer , Mario Flajslik
IPC: G06F3/06
CPC classification number: G06F3/0653 , G06F3/0616 , G06F3/0656 , G06F3/0673 , G06F13/1673 , G06F13/28
Abstract: Technologies for fine-grained completion tracking of memory buffer accesses include a compute device. The compute device is to establish multiple counter pairs for a memory buffer. Each counter pair includes a locally managed offset and a completion counter. The compute device is also to receive a request from a remote compute device to access the memory buffer, assign one of the counter pairs to the request, advance the locally managed offset of the assigned counter pair by the amount of data to be read or written, and advance the completion counter of the assigned counter pair as the data is read from or written to the memory buffer. Other embodiments are also described and claimed.
-
5.发明公开
公开(公告)号：US20240330084A1
公开(公告)日：2024-10-03
申请号：US18525553
申请日：2023-11-30
Applicant: Intel Corporation
Inventor： Mario Flajslik , James Dinan
Abstract: Systems, apparatuses and methods may provide for detecting an outbound communication and identifying a context of the outbound communication. Additionally, a completion status of the outbound communication may be tracked relative to the context. In one example, tracking the completion status includes incrementing a sent messages counter associated with the context in response to the outbound communication, detecting an acknowledgement of the outbound communication based on a network response to the outbound communication, incrementing a received acknowledgements counter associated with the context in response to the acknowledgement, comparing the sent messages counter to the received acknowledgements counter, and triggering a per-context memory ordering operation if the sent messages counter and the received acknowledgements counter have matching values.
-
公开(公告)号：US11477122B2
公开(公告)日：2022-10-18
申请号：US15716831
申请日：2017-09-27
Applicant: Intel Corporation
Inventor： Mario Flajslik , Eric R. Borch , Timo Schneider , Michael A. Parker
IPC: H04L47/22 , H04L43/0894 , H04L41/0896 , H04L43/0888 , H04L45/12 , H04L41/0893 , H04L43/0882 , H04L47/625
Abstract: Technologies for improving throughput in a network include a node switch. The node switch is to obtain expected performance data indicative of an expected data transfer performance of the node switch. The node switch is also to obtain measured performance data indicative of a measured data transfer performance of the node switch, compare the measured performance data to the expected performance data to determine whether the measured data transfer performance satisfies the expected data transfer performance, determine, as a function of whether the measured data transfer performance satisfies the expected data transfer performance, whether to force a unit of data through a non-minimal path to a destination, and send, in response to a determination to force the unit of data to be sent through a non-minimal path, the unit of data to an output port of the node switch associated with the non-minimal path. Other embodiments are also described.
-
7.发明授权
公开(公告)号：US11153105B2
公开(公告)日：2021-10-19
申请号：US15636766
申请日：2017-06-29
Applicant: Intel Corporation
Inventor： Mario Flajslik , Eric R. Borch , Michael A. Parker , Richard J. Dischler
IPC: H04L12/12 , H04L12/24 , H04L12/44 , H04W40/28 , H04L12/721 , H04L12/933
Abstract: Technologies for densely packaging network components for large scale indirect topologies include group of switches. The group of switches includes a stack of node switches that includes a first set of ports and a stack of global switches that includes a second set of ports. The stack of node switches are oriented orthogonally to the stack of global switches. Additionally, the first set of ports are oriented towards the second set of ports and the node switches are connected to the global switches through the first and second sets of ports. Other embodiments are also described and claimed.
-
公开(公告)号：US10305805B2
公开(公告)日：2019-05-28
申请号：US15200442
申请日：2016-07-01
Applicant: Intel Corporation
Inventor： Mario Flajslik , Eric R. Borch , Michael A. Parker
IPC: H04L12/803 , H04L12/801 , H04L12/835
Abstract: Technologies for adaptive routing based on aggregated congestion information include a network switch that includes a plurality of output ports. The network switch is configured to determine a maximum local occupancy count for each output port based on a maximum local occupancy count of output buffer queues of each output port, a local congestion value based on the maximum local occupancy count, and a remote congestion value for a corresponding remote input buffer queue of a remote computing device communicatively coupled to a corresponding output port. The network switch is further configured to determine, for each output port, a total congestion value as a function of the local congestion value and the remote congestion value and enqueue the network packet into one of the output buffer queues of one of the output ports based on the total congestion values of the output ports. Other embodiments are described herein.
-
公开(公告)号：US20170085625A1
公开(公告)日：2017-03-23
申请号：US14858051
申请日：2015-09-18
Applicant: Intel Corporation
Inventor： James Dinan , Mario Flajslik , Keith D. Underwood
IPC: H04L29/08 , H04L12/743 , H04L12/863
Abstract: Technologies for handling message passing interface receive operations include a compute node to determine a plurality of parameters of a receive entry to be posted and determine whether the plurality of parameters includes a wildcard entry. The compute node generates a hash based on at least one parameter of the plurality of parameters in response to determining that the plurality of parameters does not include the wildcard entry and appends the receive entry to a list in a bin of a posted receive data structure, wherein the bin is determined based on the generated hash. The compute node further tracks the wildcard entry in the posted receive data structure in response to determining the plurality of parameters includes the wildcard entry and appends the receive entry to a wildcard list of the posted receive data structure in response to tracking the wildcard entry.
-
公开(公告)号：US20160314073A1
公开(公告)日：2016-10-27
申请号：US14696719
申请日：2015-04-27
Applicant: Intel Corporation
Inventor： James Dinan , Mario Flajslik
IPC: G06F12/10 , G06F15/173
CPC classification number: G06F15/17331 , G06F3/061 , G06F3/0659 , G06F3/067
Abstract: Technologies for one-side remote memory access communication include multiple computing nodes in communication over a network. A receiver computing node receives a message from a sender node and extracts a segment identifier from the message. The receiver computing node determines, based on the segment identifier, a segment start address associated with a partitioned global address space (PGAS) segment of its local memory. The receiver computing node may index a segment table stored in the local memory or in a host fabric interface. The receiver computing node determines a local destination address within the PGAS segment based on the segment start address and an offset included in the message. The receiver computing node performs a remote memory access operation at the local destination address. The receiver computing node may perform those operations in hardware by the host fabric interface of the receiver computing node. Other embodiments are described and claimed.
Abstract translation: 用于单侧远程存储器访问通信的技术包括通过网络进行通信的多个计算节点。 接收机计算节点从发送方节点接收消息，并从消息中提取分段标识符。 接收机计算节点基于段标识符确定与其本地存储器的分区全局地址空间（PGAS）段相关联的段起始地址。 接收机计算节点可以索引存储在本地存储器或主机结构接口中的段表。 接收机计算节点基于段起始地址和消息中包含的偏移来确定PGAS段内的本地目的地址。 接收机计算节点在本地目的地地址执行远程存储器访问操作。 接收机计算节点可以由接收机计算节点的主机结构接口在硬件中执行这些操作。 描述和要求保护其他实施例。
