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公开(公告)号:US20160350237A1
公开(公告)日:2016-12-01
申请号:US14721625
申请日:2015-05-26
Applicant: Intel Corporation
Inventor: Aravindh V. Anantaraman , Zvika Greenfield , Israel Diamand , Anant V. Nori , Pradeep Ramachandran , Nir Misgav
CPC classification number: G06F12/121 , G06F9/4418 , G06F12/0804 , G06F12/0864 , G06F12/0868 , G06F12/0891 , G06F12/0893 , G06F12/123 , G06F12/128 , G06F2212/1021 , G06F2212/1024 , G06F2212/214 , G06F2212/608
Abstract: Apparatus, systems, and methods to manage memory operations are described. In one example, a controller comprises logic to receive a first transaction to operate on a first data element in the cache memory, perform a lookup operation for the first data element in the volatile memory and in response to a failed lookup operation, to generate a cache scrub hint forward the cache scrub hint to a cache scrub engine and identify one or more cache lines to scrub based at least in part on the cache scrub hint. Other examples are also disclosed and claimed.
Abstract translation: 描述了管理存储器操作的装置,系统和方法。 在一个示例中,控制器包括接收第一事务以对高速缓冲存储器中的第一数据元进行操作的逻辑,对易失性存储器中的第一数据元素执行查找操作,并响应于失败的查找操作,生成 缓存擦除提示将高速缓存擦除提示转发到缓存清理引擎,并至少部分基于缓存擦除提示来识别要擦除的一个或多个缓存行。 还公开并要求保护其他实例。
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公开(公告)号:US09767041B2
公开(公告)日:2017-09-19
申请号:US14721625
申请日:2015-05-26
Applicant: Intel Corporation
Inventor: Aravindh V. Anantaraman , Zvika Greenfield , Israel Diamand , Anant V. Nori , Pradeep Ramachandran , Nir Misgav
IPC: G06F12/12 , G06F12/08 , G06F12/121 , G06F12/0891 , G06F12/0804 , G06F12/0868 , G06F12/0893 , G06F12/0864 , G06F12/123 , G06F12/128 , G06F9/44
CPC classification number: G06F12/121 , G06F9/4418 , G06F12/0804 , G06F12/0864 , G06F12/0868 , G06F12/0891 , G06F12/0893 , G06F12/123 , G06F12/128 , G06F2212/1021 , G06F2212/1024 , G06F2212/214 , G06F2212/608
Abstract: Apparatus, systems, and methods to manage memory operations are described. In one example, a controller comprises logic to receive a first transaction to operate on a first data element in the cache memory, perform a lookup operation for the first data element in the volatile memory and in response to a failed lookup operation, to generate a cache scrub hint forward the cache scrub hint to a cache scrub engine and identify one or more cache lines to scrub based at least in part on the cache scrub hint. Other examples are also disclosed and claimed.