公开(公告)号：US20160378611A1

公开(公告)日：2016-12-29

申请号：US14748650

申请日：2015-06-24

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/14

CPC classification number: G06F11/1451 ,  G06F11/00 ,  G06F11/1438 ,  G06F11/1469 ,  G06F2201/84

Abstract: Technologies for environment checkpointing include an orchestration node communicatively coupled to one or more working computing nodes. The orchestration node is configured to administer an environment checkpointing event by transmitting a checkpoint initialization signal to each of the one or more working computing nodes that have been registered with the orchestration node. Each working computing node is configured to pause and buffer any presently executing applications, save checkpointing data (an execution state of each of the one or more applications) and transmit the checkpointing data to the orchestration node. Other embodiments are described and claimed.

Abstract translation: 用于环境检查点的技术包括通信地耦合到一个或多个工作计算节点的编排节点。 业务流程节点被配置为通过将检查点初始化信号发送到已经向业务流程节点注册的一个或多个工作计算节点中的每一个来管理环境检查点事件。 每个工作计算节点被配置为暂停和缓冲当前正在执行的任何应用程序，保存检查点数据（一个或多个应用程序中的每一个的执行状态），并将该检查点数据发送到业务流程节点。 描述和要求保护其他实施例。

公开(公告)号：US20160357645A1

公开(公告)日：2016-12-08

申请号：US15240527

申请日：2016-08-18

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/14

CPC classification number: G06F11/1469 ,  G06F11/1407 ,  G06F11/1438 ,  G06F11/1446 ,  G06F11/1451 ,  G06F11/1456 ,  G06F11/1471 ,  G06F11/3017 ,  G06F11/3648 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/82 ,  G06F2201/84 ,  G06F2201/86

Abstract: Technologies for hardware-assisted application checkpointing include a computing device having a processor with hardware checkpoint support. In response to encountering a checkpoint event during execution of an application, the computing device saves the execution state of the application to nonvolatile storage using the hardware checkpoint support. The computing device may also restore the execution state using the hardware checkpoint support. The hardware checkpoint support may save part or all of the virtual memory space of the application in a manner transparent to the executing process. The hardware checkpoint support may be invoked using one or more system hooks such as system calls or processor instructions. The computing device may monitor for checkpoint events using hardware event monitors of the processor, chipset, or other components of the computing device. The computing device may store execution state in a dedicated flash memory cache. Other embodiments are described and claimed.

Abstract translation: 用于硬件辅助应用程序检查点的技术包括具有具有硬件检查点支持的处理器的计算设备。 响应于在执行应用期间遇到检查点事件，计算设备使用硬件检查点支持将应用的执行状态保存到非易失性存储器。 计算设备还可以使用硬件检查点支持来恢复执行状态。 硬件检查点支持可以以对执行过程透明的方式保存应用程序的部分或全部虚拟内存空间。 可以使用诸如系统调用或处理器指令的一个或多个系统钩来调用硬件检查点支持。 计算设备可以使用处理器，芯片组或计算设备的其他组件的硬件事件监视器监视检查点事件。 计算设备可以将执行状态存储在专用闪速存储器高速缓存中。 描述和要求保护其他实施例。

公开(公告)号：US09424142B2

公开(公告)日：2016-08-23

申请号：US14340039

申请日：2014-07-24

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/00 ,  G06F11/14 ,  G06F11/36

CPC classification number: G06F11/1469 ,  G06F11/1407 ,  G06F11/1438 ,  G06F11/1446 ,  G06F11/1451 ,  G06F11/1456 ,  G06F11/1471 ,  G06F11/3017 ,  G06F11/3648 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/82 ,  G06F2201/84 ,  G06F2201/86

Abstract: Technologies for hardware-assisted application checkpointing include a computing device having a processor with hardware checkpoint support. In response to encountering a checkpoint event during execution of an application, the computing device saves the execution state of the application to nonvolatile storage using the hardware checkpoint support. The computing device may also restore the execution state using the hardware checkpoint support. The hardware checkpoint support may save part or all of the virtual memory space of the application in a manner transparent to the executing process. The hardware checkpoint support may be invoked using one or more system hooks such as system calls or processor instructions. The computing device may monitor for checkpoint events using hardware event monitors of the processor, chipset, or other components of the computing device. The computing device may store execution state in a dedicated flash memory cache. Other embodiments are described and claimed.

Abstract translation: 用于硬件辅助应用程序检查点的技术包括具有具有硬件检查点支持的处理器的计算设备。 响应于在执行应用期间遇到检查点事件，计算设备使用硬件检查点支持将应用的执行状态保存到非易失性存储器。 计算设备还可以使用硬件检查点支持来恢复执行状态。 硬件检查点支持可以以对执行过程透明的方式保存应用程序的部分或全部虚拟内存空间。 可以使用诸如系统调用或处理器指令的一个或多个系统钩来调用硬件检查点支持。 计算设备可以使用处理器，芯片组或计算设备的其他组件的硬件事件监视器监视检查点事件。 计算设备可以将执行状态存储在专用闪速存储器高速缓存中。 描述和要求保护其他实施例。

公开(公告)号：US10146641B2

公开(公告)日：2018-12-04

申请号：US15240527

申请日：2016-08-18

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/00 ,  G06F11/14 ,  G06F11/36 ,  G06F11/30

Abstract: Technologies for hardware-assisted application checkpointing include a computing device having a processor with hardware checkpoint support. In response to encountering a checkpoint event during execution of an application, the computing device saves the execution state of the application to nonvolatile storage using the hardware checkpoint support. The computing device may also restore the execution state using the hardware checkpoint support. The hardware checkpoint support may save part or all of the virtual memory space of the application in a manner transparent to the executing process. The hardware checkpoint support may be invoked using one or more system hooks such as system calls or processor instructions. The computing device may monitor for checkpoint events using hardware event monitors of the processor, chipset, or other components of the computing device. The computing device may store execution state in a dedicated flash memory cache. Other embodiments are described and claimed.

公开(公告)号：US20160026546A1

公开(公告)日：2016-01-28

申请号：US14340039

申请日：2014-07-24

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/14

CPC classification number: G06F11/1469 ,  G06F11/1407 ,  G06F11/1438 ,  G06F11/1446 ,  G06F11/1451 ,  G06F11/1456 ,  G06F11/1471 ,  G06F11/3017 ,  G06F11/3648 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2201/82 ,  G06F2201/84 ,  G06F2201/86

Abstract: Technologies for hardware-assisted application checkpointing include a computing device having a processor with hardware checkpoint support. In response to encountering a checkpoint event during execution of an application, the computing device saves the execution state of the application to nonvolatile storage using the hardware checkpoint support. The computing device may also restore the execution state using the hardware checkpoint support. The hardware checkpoint support may save part or all of the virtual memory space of the application in a manner transparent to the executing process. The hardware checkpoint support may be invoked using one or more system hooks such as system calls or processor instructions. The computing device may monitor for checkpoint events using hardware event monitors of the processor, chipset, or other components of the computing device. The computing device may store execution state in a dedicated flash memory cache. Other embodiments are described and claimed.

公开(公告)号：US20170357552A1

公开(公告)日：2017-12-14

申请号：US15670707

申请日：2017-08-07

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/14 ,  G06F11/00

CPC classification number: G06F11/1451 ,  G06F11/00 ,  G06F11/1438 ,  G06F11/1469 ,  G06F2201/84

Abstract: Technologies for environment checkpointing include an orchestration node communicatively coupled to one or more working computing nodes. The orchestration node is configured to administer an environment checkpointing event by transmitting a checkpoint initialization signal to each of the one or more working computing nodes that have been registered with the orchestration node. Each working computing node is configured to pause and buffer any presently executing applications, save checkpointing data (an execution state of each of the one or more applications) and transmit the checkpointing data to the orchestration node. Other embodiments are described and claimed.

公开(公告)号：US09727421B2

公开(公告)日：2017-08-08

申请号：US14748650

申请日：2015-06-24

Applicant: Intel Corporation

Inventor： Igor Ljubuncic ,  Ravi A. Giri

IPC: G06F11/00 ,  G06F11/14

CPC classification number: G06F11/1451 ,  G06F11/00 ,  G06F11/1438 ,  G06F11/1469 ,  G06F2201/84

Abstract: Technologies for environment checkpointing include an orchestration node communicatively coupled to one or more working computing nodes. The orchestration node is configured to administer an environment checkpointing event by transmitting a checkpoint initialization signal to each of the one or more working computing nodes that have been registered with the orchestration node. Each working computing node is configured to pause and buffer any presently executing applications, save checkpointing data (an execution state of each of the one or more applications) and transmit the checkpointing data to the orchestration node. Other embodiments are described and claimed.