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1.发明授权公开(公告)号：US10044322B2
公开(公告)日：2018-08-07
申请号：US15609041
申请日：2017-05-31
申请人： Intel IP Corporation
发明人： Andreas Menkhoff , Zdravko Boos
摘要： A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.
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公开(公告)号：US09847676B2
公开(公告)日：2017-12-19
申请号：US14039996
申请日：2013-09-27
申请人： Intel IP Corporation
发明人： Paolo Madoglio , Georgios Palaskas , Bernd-Ulrich Klepser , Andreas Menkhoff , Zdravko Boos , Andreas Boehme , Michael Bruennert
CPC分类号： H02J50/20 , H02J7/025 , H02J17/00 , H02J50/90 , H04B1/0475 , H04L27/361 , H04W52/0251 , H04W52/028 , H04W52/52 , Y02D70/00 , Y02D70/40
摘要： This document discusses apparatus and methods for reducing energy consumption of digital-to-time converter (DTC) based transmitters. In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive phase information from a baseband processor and to provide a first modulation signal for generating a wireless signal, and a detector configured to detect an operating condition of the wireless device and to adjust a parameter of the DTC in response to a change in the operating condition.
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公开(公告)号：US09660798B2
公开(公告)日：2017-05-23
申请号：US14997056
申请日：2016-01-15
申请人： Intel IP Corporation
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Bernd-Ulrich Klepser , Zdravko Boos , Georgios Palaskas , Stefano Pellerano , Paolo Madoglio
IPC分类号： H04L27/36 , H04L27/12 , H04L7/033 , H04B7/06 , H04L27/20 , H04W88/06 , H03L7/16 , H04B7/0413 , H04L27/152 , H03K5/00
CPC分类号： H04L7/033 , H03K2005/00234 , H03L7/16 , H04B7/0413 , H04B7/06 , H04L27/152 , H04L27/1525 , H04L27/20 , H04W88/06
摘要： This application discusses, among other things, apparatus and methods for sharing a local oscillator between multiple wireless devices. In certain examples, an apparatus can include a central frequency synthesizer configured to provide a central oscillator signal having a first frequency, a first transmitter, the first transmitter including a first transmit digital-to-time converter (DTC) configured to receive the central oscillator signal and to provide a first transmitter signal having a second frequency, and a first receiver, the first receiver including a first receive DTC configured to receive the central oscillator signal and to provide a first receiver signal having a first receive frequency.
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公开(公告)号：US20160359457A1
公开(公告)日：2016-12-08
申请号：US15243343
申请日：2016-08-22
申请人： Intel IP Corporation
发明人： Zdravko Boos , Bernd-Ulrich Klepser
IPC分类号： H03B5/32
摘要： An apparatus comprises a mechanical resonator-based oscillator module generating a local oscillator signal with a frequency of more than 700 MHz. Further, the apparatus comprises a digital-to-time converter module generating a frequency adapted signal based on the local oscillator signal.
摘要翻译： 一种装置包括基于机械谐振器的振荡器模块，其产生频率大于700MHz的本地振荡器信号。 此外，该装置包括数字 - 时间转换器模块，其基于本地振荡器信号产生频率适配信号。
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公开(公告)号：US20160285469A1
公开(公告)日：2016-09-29
申请号：US15045783
申请日：2016-02-17
申请人： Intel IP Corporation
发明人： Bernhard Raaf , Zdravko Boos , Stefan Meier
摘要： An apparatus for providing oscillator signals includes a first digital-to-time converter module configured to generate a first oscillator signal based on a first adapted input signal, a second digital-to-time converter module configured to generate a second oscillator signal; and a first processing module configured to generate the first adapted input signal of the first digital-to-time converter module by adding noise to a first input signal.
摘要翻译： 一种用于提供振荡器信号的装置包括：第一数字 - 时间转换器模块，被配置为基于第一适配输入信号产生第一振荡器信号;第二数字 - 时间转换器模块，被配置为产生第二振荡器信号; 以及第一处理模块，被配置为通过将噪声加到第一输入信号上来产生第一数字 - 时间转换器模块的第一适配输入信号。
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公开(公告)号：US20160094249A1
公开(公告)日：2016-03-31
申请号：US14835851
申请日：2015-08-26
申请人： Intel IP Corporation
发明人： Ashkan Naeini , Gerhard Mitteregger , Zdravko Boos
CPC分类号： H04B1/0053 , H04B1/0021 , H04B1/006 , H04L5/001 , H04L5/143 , H04L27/0002 , H04L27/261 , H04L27/362 , H04L27/38
摘要： An apparatus for generating base band receive signals includes a first analog-to-digital converter module generating a first digital high frequency receive signal at least by sampling a first analog high frequency receive signal, a first digital signal processing module generating a first base band receive signal based on the first digital high frequency receive signal, a second analog-to-digital converter module generating a second digital high frequency receive signal at least by sampling a second analog high frequency receive signal and a second digital signal processing module generating a second base band receive signal based on the second digital high frequency receive signal. The first analog high frequency receive signal comprises first payload data at a first receive channel associated with a first carrier frequency and the second analog high frequency receive signal comprises second payload data at a second receive channel associated with a second carrier frequency.
摘要翻译： 用于产生基带接收信号的装置包括：第一模数转换器模块，至少通过对第一模拟高频接收信号进行采样来产生第一数字高频接收信号;第一数字信号处理模块，产生第一基带接收 基于第一数字高频接收信号的信号;第二模数转换器模块，至少通过采样第二模拟高频接收信号产生第二数字高频接收信号;以及第二数字信号处理模块，产生第二基极 基于第二数字高频接收信号的频带接收信号。 第一模拟高频接收信号包括与第一载波频率相关联的第一接收信道的第一有效载荷数据，并且第二模拟高频接收信号包括与第二载波频率相关联的第二接收信道的第二有效载荷数据。
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公开(公告)号：US11411595B2
公开(公告)日：2022-08-09
申请号：US16955073
申请日：2018-03-28
申请人： Intel IP Corporation
发明人： Zdravko Boos
摘要： Systems, methods, and circuitries are provided for extending the range of an analog-to-digital converter (ADC) associated with interference cancellation. In one example a transceiver includes front end circuitry configured to transmit a radio frequency (RF) transmit signal that includes an intended signal and an interference signal. The transceiver includes self-interference cancellation (SIC) circuitry configured to control the front end circuitry based at least on a digital baseband reference transmit signal that comprises a digital representation of the intended signal. ADC range extension circuitry is provided to: receive the RF transmit signal from the front end circuitry; receive the digital baseband reference transmit signal from the SIC circuitry; approximate the interference signal by generating an analog estimated interference signal that corresponds to a difference between the RF transmit signal and the digital baseband reference transmit signal; and provide the analog estimated interference signal to the ADC.
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公开(公告)号：US20210006279A1
公开(公告)日：2021-01-07
申请号：US16955073
申请日：2018-03-28
申请人： Intel IP Corporation
发明人： Zdravko Boos
摘要： Systems, methods, and circuitries are provided for extending the range of an analog-to-digital converter (ADC) associated with interference cancellation. In one example a transceiver includes front end circuitry configured to transmit a radio frequency (RF) transmit signal that includes an intended signal and an interference signal. The transceiver includes self-interference cancellation (SIC) circuitry configured to control the front end circuitry based at least on a digital baseband reference transmit signal that comprises a digital representation of the intended signal. ADC range extension circuitry is provided to: receive the RF transmit signal from the front end circuitry; receive the digital baseband reference transmit signal from the SIC circuitry; approximate the interference signal by generating an analog estimated interference signal that corresponds to a difference between the RF transmit signal and the digital baseband reference transmit signal; and provide the analog estimated interference signal to the ADC.
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公开(公告)号：US09800203B2
公开(公告)日：2017-10-24
申请号：US15243343
申请日：2016-08-22
申请人： Intel IP Corporation
发明人： Zdravko Boos , Bernd-Ulrich Klepser
摘要： An apparatus comprises a mechanical resonator-based oscillator module generating a local oscillator signal with a frequency of more than 700 MHz. Further, the apparatus comprises a digital-to-time converter module generating a frequency adapted signal based on the local oscillator signal.
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公开(公告)号：US09608672B2
公开(公告)日：2017-03-28
申请号：US14835851
申请日：2015-08-26
申请人： Intel IP Corporation
发明人： Ashkan Naeini , Gerhard Mitteregger , Zdravko Boos
CPC分类号： H04B1/0053 , H04B1/0021 , H04B1/006 , H04L5/001 , H04L5/143 , H04L27/0002 , H04L27/261 , H04L27/362 , H04L27/38
摘要： An apparatus for generating base band receive signals includes a first analog-to-digital converter module generating a first digital high frequency receive signal at least by sampling a first analog high frequency receive signal, a first digital signal processing module generating a first base band receive signal based on the first digital high frequency receive signal, a second analog-to-digital converter module generating a second digital high frequency receive signal at least by sampling a second analog high frequency receive signal and a second digital signal processing module generating a second base band receive signal based on the second digital high frequency receive signal. The first analog high frequency receive signal comprises first payload data at a first receive channel associated with a first carrier frequency and the second analog high frequency receive signal comprises second payload data at a second receive channel associated with a second carrier frequency.
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