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公开(公告)号：US20230202835A1
公开(公告)日：2023-06-29
申请号：US18115178
申请日：2023-02-28
申请人： InvenSense, Inc.
发明人： Daesung Lee , Alan Cuthbertson
CPC分类号： B81C1/00095 , B81B7/0006 , B81B2207/07 , B81B2207/012 , B81C2201/014 , B81C2201/0198 , B81C2203/036 , B81C2203/0792
摘要： A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.
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公开(公告)号：US20230100960A1
公开(公告)日：2023-03-30
申请号：US18071322
申请日：2022-11-29
申请人： InvenSense, Inc.
发明人： Ashfaque Uddin , Daesung Lee , Alan Cuthbertson
摘要： A method includes fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a first mask on a second side of the device wafer, wherein the second side is planar. A plurality of dimple features is formed on an exposed portion on the second side of the device wafer. The first mask is removed from the second side of the device wafer. A second mask is deposited on the second side of the device wafer that corresponds to a standoff. An exposed portion on the second side of the device wafer is etched to form the standoff. The second mask is removed. A rough polysilicon layer is deposited on the second side of the device wafer. A eutectic bond layer is deposited on the standoff. In some embodiments, a micro-electromechanical system (MEMS) device pattern is etched into the device wafer.
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公开(公告)号：US10081539B2
公开(公告)日：2018-09-25
申请号：US15645665
申请日：2017-07-10
申请人： InvenSense, Inc.
发明人： Daesung Lee , Jeff Huang , Ki Young Lee
CPC分类号： B81C1/00238 , B81B7/007 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2207/012 , B81B2207/07 , B81B2207/096 , B81C1/00269 , B81C1/00301 , B81C2203/0109 , B81C2203/035 , B81C2203/037 , B81C2203/0792
摘要： Provided herein is a method including forming a micro-electro-mechanical system (“MEMS”) wafer including a first MEMS device and a second MEMS device. A complementary metal-oxide semiconductor (“CMOS”) wafer is formed including a first electrically conductive via and a second electrically conductive via. A layer stack including a first conductive layer, a second conductive layer, and a bond layer is deposited over the first electrically conductive via and the second electrically conductive via. The layer stack is etched to define a first standoff, a second standoff, a third standoff, a first bump stop over the first electrically conductive via, and a second bump stop over the second electrically conductive via. The first bump stop and the second bump stop are etched to remove the bond layer. The first bump stop is further etched to remove the second conductive layer. The MEMS wafer is bonded to the CMOS wafer.
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公开(公告)号：US09725305B2
公开(公告)日：2017-08-08
申请号：US15071499
申请日：2016-03-16
申请人： InvenSense, Inc.
发明人： Jong Il Shin , Peter Smeys , Daesung Lee
IPC分类号： H01L21/302 , B81C1/00 , B81B7/02
CPC分类号： B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2207/012 , B81C1/00214 , B81C1/00293 , B81C2203/0118 , B81C2203/035 , G01P15/0802
摘要： Provided herein is a method including forming a trench in a handle substrate, and a trench lining is formed in the trench. A first cavity and a second cavity are formed in the handle substrate, wherein the first cavity is connected to the trench. A first MEMS structure and the handle substrate are sealed for maintaining a first pressure within the trench and the first cavity. A second MEMS structure and the handle substrate are sealed for maintaining the first pressure within the second cavity. A portion of the trench lining is exposed, and the first pressure is changed to a second pressure within the first cavity. The first cavity and the trench are sealed to maintain the second pressure within the trench and the first cavity.
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公开(公告)号：US11945713B2
公开(公告)日：2024-04-02
申请号：US16504999
申请日：2019-07-08
申请人： INVENSENSE, INC.
发明人： Daesung Lee , Jeff Chunchieh Huang , Jongwoo Shin , Bongsang Kim , Logeeswaran Veerayah Jayaraman
CPC分类号： B81B7/0038 , B81B3/0008 , B81B7/02 , B81C1/00285 , B81B2201/0235 , B81B2201/0242 , B81B2207/012 , B81C2203/0118
摘要： Systems and methods are provided that provide a getter in a micromechanical system. In some embodiments, a microelectromechanical system (MEMS) is bonded to a substrate. The MEMS and the substrate have a first cavity and a second cavity therebetween. A first getter is provided on the substrate in the first cavity and integrated with an electrode. A second getter is provided in the first cavity over a passivation layer on the substrate. In some embodiments, the first cavity is a gyroscope cavity, and the second cavity is an accelerometer cavity.
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公开(公告)号：US11905170B2
公开(公告)日：2024-02-20
申请号：US17547388
申请日：2021-12-10
申请人： InvenSense, Inc.
发明人： Daesung Lee , Alan Cuthbertson
IPC分类号： B81C1/00
CPC分类号： B81C1/00896 , B81C2203/0785
摘要： A method includes tab dicing a region of a tab region disposed between a first die and a second die. The tab region structurally connects the first die to the second die each including a MEMS device eutecticly bonded to a CMOS device. The tab region includes a handle wafer layer disposed over a fusion bond oxide layer that is disposed on an ACT layer. The tab region is positioned above a CMOS tab region that with the first and second die form a cavity therein. The tab dicing cuts through the handle wafer layer and leaves a portion of the fusion bond oxide layer underneath the handle wafer layer to form an oxide tether within the tab region. The oxide tether maintains the tab region in place and above the CMOS tab region. Subsequent to the tab dicing the first region, the tab region is removed.
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公开(公告)号：US11731871B2
公开(公告)日：2023-08-22
申请号：US17334493
申请日：2021-05-28
申请人： InvenSense, Inc.
发明人： Ashfaque Uddin , Daesung Lee , Alan Cuthbertson
CPC分类号： B81C1/00801 , B81B3/001 , B81B7/0025 , B81B7/02 , B81C1/00968 , B81B2201/0235 , B81B2201/0242 , B81B2203/0127 , B81B2207/012 , B81C2201/014 , B81C2201/0132 , B81C2203/036 , B81C2203/0792
摘要： A method includes forming an etch stop layer over a first side of a device wafer. The method also includes forming a polysilicon layer over the etch stop layer. A handle wafer is fusion bonded to the first side of the device wafer. A eutectic bond layer is formed on a second side of the device wafer. A micro-electro-mechanical system (MEMS) features are etched into the second side of the device wafer to expose the etch stop layer. The exposed etch stop layer is removed to expose the polysilicon layer. The exposed polysilicon layer is removed to expose a cavity formed between the handle wafer and the device wafer.
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公开(公告)号：US11618674B2
公开(公告)日：2023-04-04
申请号：US17195346
申请日：2021-03-08
申请人： InvenSense, Inc.
发明人： Daesung Lee , Alan Cuthbertson
摘要： A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.
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公开(公告)号：US20230045257A1
公开(公告)日：2023-02-09
申请号：US17877151
申请日：2022-07-29
申请人： InvenSense, Inc.
发明人： Daesung Lee , Alan Cuthbertson
IPC分类号： B81C1/00
摘要： A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.
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公开(公告)号：US20220348455A1
公开(公告)日：2022-11-03
申请号：US17812856
申请日：2022-07-15
申请人： INVENSENSE, INC.
发明人： Daesung Lee , Jeff Chunchieh Huang , Jongwoo Shin , Bongsang Kim , Logeeswaran Veerayah Jayaraman
摘要： Systems and methods are provided that provide a getter in a micromechanical system. In some embodiments, a microelectromechanical system (MEMS) is bonded to a substrate. The MEMS and the substrate have a first cavity and a second cavity therebetween. A first getter is provided on the substrate in the first cavity and integrated with an electrode. A second getter is provided in the first cavity over a passivation layer on the substrate. In some embodiments, the first cavity is a gyroscope cavity, and the second cavity is an accelerometer cavity.
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