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    3D INTEGRATION USING Al-Ge EUTECTIC BOND INTERCONNECT
    2.
    发明申请
    3D INTEGRATION USING Al-Ge EUTECTIC BOND INTERCONNECT 审中-公开

    公开(公告)号：US20170330863A1

    公开(公告)日：2017-11-16

    申请号：US15663242

    申请日：2017-07-28

    申请人： InvenSense, Inc.

    发明人： Peter Smeys ,  Mozafar Maghsoudnia

    IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/00

    摘要： A method includes aligning a germanium feature on a first CMOS wafer with an aluminum feature on a second CMOS wafer. The aluminum feature and the germanium feature are pressed together. A eutectic bond is formed connecting the aluminum feature to the germanium feature. The eutectic bond has a melting point which is lower than the melting point of aluminum and the melting point of germanium.

    MEMS gap control structures
    4.
    发明授权
    MEMS gap control structures 有权

    公开(公告)号：US10308507B2

    公开(公告)日：2019-06-04

    申请号：US15298499

    申请日：2016-10-20

    申请人： InvenSense, Inc.

    发明人： Jong Ii Shin ,  Peter Smeys ,  Bongsang Kim

    IPC分类号： H01L21/02 ,  H01L29/84 ,  H01L23/02 ,  B81C1/00 ,  B81B3/00 ,  H01L41/31 ,  B81B7/00 ,  B81B7/02

    摘要： Provided herein is a method including forming a cavity in a first side of a first silicon wafer. An oxide layer is formed on the first side and in the cavity. The first side of the first silicon wafer is bonded to a first side of a second silicon wafer, and a gap control structure is deposited on a second side of the second silicon wafer. A MEMS structure is formed in the second silicon wafer. The second side of the second silicon wafer is eutecticly bonded to the third silicon wafer, and the eutectic bonding includes pressing the second silicon wafer to the third silicon wafer.

    CMOS-MEMS integrated device including multiple cavities at different controlled pressures and methods of manufacture
    5.
    发明授权
    CMOS-MEMS integrated device including multiple cavities at different controlled pressures and methods of manufacture 有权

    公开(公告)号：US10221065B2

    公开(公告)日：2019-03-05

    申请号：US15461270

    申请日：2017-03-16

    申请人： INVENSENSE, INC.

    发明人： Daesung Lee ,  Jongwoo Shin ,  Jong Il Shin ,  Peter Smeys ,  Martin Lim

    IPC分类号： H01L23/02 ,  B81C1/00 ,  B81B7/00 ,  B81B7/02

    摘要： An integrated MEMS device comprises two substrates where the first and second substrates are coupled together and have two enclosures there between. One of the first and second substrates includes an outgassing source layer and an outgassing barrier layer to adjust pressure within the two enclosures. The method includes depositing and patterning an outgassing source layer and a first outgassing barrier layer on the substrate, resulting in two cross-sections. In one of the two cross-sections a top surface of the outgassing source layer is not covered by the outgassing barrier layer and in the other of the two cross-sections the outgassing source layer is encapsulated in the outgassing barrier layer. The method also includes depositing conformally a second outgassing barrier layer and etching the second outgassing barrier layer such that a spacer of the second outgassing barrier layer is left on sidewalls of the outgassing source layer.

    MEMS sensor integrated with a flip chip
    9.
    发明授权
    MEMS sensor integrated with a flip chip 有权

    公开(公告)号：US09611137B2

    公开(公告)日：2017-04-04

    申请号：US14559715

    申请日：2014-12-03

    申请人： InvenSense, Inc.

    发明人： Peter Smeys ,  Mozafar Maghsoudnia

    IPC分类号： H01L23/12 ,  B81B7/00 ,  B81C1/00

    CPC分类号： B81B7/007 ,  B81B7/008 ,  B81C1/00238 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2924/00014

    摘要： A method and system for providing a MEMS sensor integrated with a flip chip are disclosed. In a first aspect, the system comprises a MEMS sensor, at least one flip chip coupled to the MEMS sensor, and at least one through-silicon via (TSV) that electrically connects the at least one flip chip to the MEMS sensor. In a second aspect, the system comprises a MEMS sensor that includes a CMOS coupled to a MEMS structure, wherein the CMOS comprises a substrate coupled to an interconnect in contact with the MEMS structure. The system further comprises a plurality of flip chips coupled to the substrate, a plurality of TSV that electrically connect the plurality of flip chips to the interconnect, and a plurality of layers on the substrate to provide electrical connections between the plurality of flip chips and from the plurality of flip chips to at least one external component.

    DUAL CAVITY PRESSURE STRUCTURES
    10.
    发明申请
    DUAL CAVITY PRESSURE STRUCTURES 有权
    双孔压力结构

    公开(公告)号：US20160272486A1

    公开(公告)日：2016-09-22

    申请号：US15071499

    申请日：2016-03-16

    申请人： InvenSense, Inc.

    发明人： Jong II Shin ,  Peter Smeys ,  Daesung Lee

    IPC分类号： B81B7/02 ,  B81C1/00

    CPC分类号： B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/012 ,  B81C1/00214 ,  B81C1/00293 ,  B81C2203/0118 ,  B81C2203/035 ,  G01P15/0802

    摘要： Provided herein is a method including forming a trench in a handle substrate, and a trench lining is formed in the trench. A first cavity and a second cavity are formed in the handle substrate, wherein the first cavity is connected to the trench. A first MEMS structure and the handle substrate are sealed for maintaining a first pressure within the trench and the first cavity. A second MEMS structure and the handle substrate are sealed for maintaining the first pressure within the second cavity. A portion of the trench lining is exposed, and the first pressure is changed to a second pressure within the first cavity. The first cavity and the trench are sealed to maintain the second pressure within the trench and the first cavity.

    摘要翻译： 这里提供了一种方法，包括在手柄基板中形成沟槽，并且沟槽衬里形成在沟槽中。 第一腔和第二腔形成在手柄衬底中，其中第一腔连接到沟槽。 第一MEMS结构和手柄基板被密封以保持沟槽和第一腔内的第一压力。 第二MEMS结构和手柄基板被密封以将第一压力保持在第二腔内。 沟槽衬里的一部分被暴露，并且第一压力被改变到第一腔内的第二压力。 第一腔体和沟槽被密封以将第二压力保持在沟槽和第一腔体内。