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    Electron-emitting device and method for manufacturing same
    1.
    发明授权
    Electron-emitting device and method for manufacturing same 有权
    电子发射器件及其制造方法

    公开(公告)号：US07635944B2

    公开(公告)日：2009-12-22

    申请号：US11289012

    申请日：2005-11-29

    申请人： Iwao Ohwada ,  Masao Takahashi ,  Takayoshi Akao ,  Shuichi Ozawa ,  Kei Kosaka

    发明人： Iwao Ohwada ,  Masao Takahashi ,  Takayoshi Akao ,  Shuichi Ozawa ,  Kei Kosaka

    IPC分类号： H01J1/46

    CPC分类号： H01J1/312 ,  B82Y10/00 ,  H01J1/32 ,  H01J31/127

    摘要： An electron-emitting device includes an emitter section composed of a dielectric material, a lower electrode disposed on the lower side of the emitter section, and an upper electrode disposed on the upper side of the emitter section so as to be opposed to the lower electrode with the emitter section therebetween, electrons being emitted from the emitter section through the upper electrode by the application of a drive voltage between the lower electrode and the upper electrode, wherein the upper electrode is provided with a plurality of through-holes which expose the emitter section and which have an average diameter of 10 nm or more and less than 100 nm, and a peripheral portion of each through-hole facing the emitter section is separated at a predetermined distance from the emitter section.

    摘要翻译： 电子发射器件包括由电介质材料构成的发射极部分，位于发射极部分下侧的下部电极和设置在发射极部分上侧的上部电极，以与下部电极 其间具有发射极部分，电子通过在下部电极和上部电极之间施加驱动电压而从发射极部分通过上部电极发射，其中上部电极设置有多个通孔，其暴露发射极 并且平均直径为10nm以上且小于100nm，并且面向发射极部的每个通孔的周边部分在与发射极部分预定距离处分离。

    Display device
    3.
    发明授权
    Display device 失效
    显示设备

    公开(公告)号：US5862275A

    公开(公告)日：1999-01-19

    申请号：US882066

    申请日：1997-06-25

    申请人： Yukihisa Takeuchi ,  Tsutomu Nanataki ,  Iwao Ohwada ,  Masao Takahashi

    发明人： Yukihisa Takeuchi ,  Tsutomu Nanataki ,  Iwao Ohwada ,  Masao Takahashi

    IPC分类号： G02B26/08 ,  G09F9/30 ,  G09G3/20 ,  G09G3/34 ,  G02B6/26 ,  H01L41/08

    CPC分类号： G09G3/3493 ,  G02B26/08 ,  G02B26/0833 ,  G02B26/0858 ,  G09G3/3473 ,  G09G3/2014 ,  G09G3/2022 ,  Y10S385/901

    摘要： Disclosed is a display device for displaying a picture on an optical waveguide plate in accordance with an image signal by controlling displacement movement of each of actuator elements in a direction to make contact or separation with respect to the optical waveguide plate so that scattered light is controlled at a predetermined position on the optical waveguide plate, wherein the actuator element comprises a main actuator element including a piezoelectric/electrostrictive layer, and a pair of electrodes formed on a first principal surface of the piezoelectric/electrostrictive layer, a vibrating section contacting with a second principal surface of the piezoelectric/electrostrictive layer, for supporting the main actuator element, and a fixed section for supporting the vibrating section in a vibrative manner, and wherein the actuator element further comprises a displacement-transmitting section for transmitting, to the optical waveguide plate, displacement movement of the main actuator element caused by applying a voltage between the pair of electrodes. According to the display device, the electrostatic capacity of the actuator element can be reduced, further, display brightness without any nonuniformity can be obtained, and it is possible to improve the image quality.

    摘要翻译： 公开了一种显示装置，用于根据图像信号在光波导板上显示图像，通过控制每个致动器元件在相对于光波导板接触或分离的方向上的位移运动，从而控制散射光 在所述光波导板上的预定位置处，所述致动器元件包括具有压电/电致伸缩层的主致动器元件和形成在所述压电/电致伸缩层的第一主表面上的一对电极，与所述压电/ 用于支撑主致动器元件的压电/电致伸缩层的第二主表面和用于以振动方式支撑振动部分的固定部分，并且其中所述致动器元件还包括位移传递部分，用于传输到所述光波导 板，主动作的位移运动 r元件通过在一对电极之间施加电压而引起。 根据显示装置，可以减小致动器元件的静电电容，而且可以获得不会不均匀的显示亮度，并且可以提高图像质量。

    Optical voltage sensor
    5.
    发明授权
    Optical voltage sensor 有权
    光电压传感器

    公开(公告)号：US08829890B2

    公开(公告)日：2014-09-09

    申请号：US12994701

    申请日：2009-05-27

    申请人： Masao Takahashi ,  Junichi Sato ,  Takashi Miyabe ,  Tokihiro Umemura ,  Tsuyoshi Kuwabara

    发明人： Masao Takahashi ,  Junichi Sato ,  Takashi Miyabe ,  Tokihiro Umemura ,  Tsuyoshi Kuwabara

    IPC分类号： G01R31/00

    CPC分类号： G01R15/242

    摘要： A polarizing optical system (15, 16) is disposed perpendicular to an optical axis of incoming light from a light source (12), having the optical axis (12) as a center axis, and configured for polarization of incoming light to a prescribed reference state, an electro-optical device (17) is disposed perpendicular to the optical axis, having the optical axis as a center axis, and adapted, as a voltage to be measured is imposed thereon, to respond to the imposed voltage by polarizing light polarized by the polarizing optical system (15, 16), and an analyzer (18) is disposed perpendicular to the optical axis, having the optical axis as a center axis, and adapted for detection of light polarized by the electro-optical device (17), to irradiate a detector (21) configured for conversion of incoming light into an electric signal.

    摘要翻译： 偏振光学系统（15,16）垂直于来自光源（12）的入射光的光轴设置，所述光源（12）具有作为中心轴的光轴（12），并被配置为将入射光偏振到规定的参考 状态，电光装置（17）垂直于光轴设置，其光轴为中心轴，并且适于作为被测电压施加于其上以通过偏振光偏振来响应所施加的电压 通过所述偏振光学系统（15,16），并且分析器（18）垂直于所述光轴设置，所述分析器（18）具有所述光轴作为中心轴线，并适于检测由所述电光装置（17）偏振的光， 照射被配置为将入射光转换成电信号的检测器（21）。

    OPTICAL VOLTAGE SENSOR
    7.
    发明申请
    OPTICAL VOLTAGE SENSOR 有权
    光电传感器

    公开(公告)号：US20110234202A1

    公开(公告)日：2011-09-29

    申请号：US12994701

    申请日：2009-05-27

    申请人： Masao Takahashi ,  Junichi Sato ,  Takashi Miyabe ,  Tokihiro Umemura ,  Tsuyoshi Kuwabara

    发明人： Masao Takahashi ,  Junichi Sato ,  Takashi Miyabe ,  Tokihiro Umemura ,  Tsuyoshi Kuwabara

    IPC分类号： G01R19/00

    CPC分类号： G01R15/242

    摘要： A polarizing optical system (15, 16) is disposed perpendicular to an optical axis of incoming light from a light source (12), having the optical axis (12) as a center axis, and configured for polarization of incoming light to a prescribed reference state, an electro-optical device (17) is disposed perpendicular to the optical axis, having the optical axis as a center axis, and adapted, as a voltage to be measured is imposed thereon, to respond to the imposed voltage by polarizing light polarized by the polarizing optical system (15, 16), and an analyzer (18) is disposed perpendicular to the optical axis, having the optical axis as a center axis, and adapted for detection of light polarized by the electro-optical device (17), to irradiate a detector (21) configured for conversion of incoming light into an electric signal.

    摘要翻译： 偏振光学系统（15,16）垂直于来自光源（12）的入射光的光轴设置，所述光源（12）具有作为中心轴的光轴（12），并被配置为将入射光偏振到规定的参考 状态，电光装置（17）垂直于光轴设置，其光轴为中心轴，并且适于作为被测电压施加于其上以通过偏振光偏振来响应所施加的电压 通过所述偏振光学系统（15,16），并且分析器（18）垂直于所述光轴设置，所述分析器（18）具有所述光轴作为中心轴线，并适于检测由所述电光装置（17）偏振的光， 照射被配置为将入射光转换成电信号的检测器（21）。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110079880A1

    公开(公告)日：2011-04-07

    申请号：US12880764

    申请日：2010-09-13

    申请人： Keiji Mita ,  Yasuhiro Tamada ,  Masao Takahashi ,  Takao Maruyama

    发明人： Keiji Mita ,  Yasuhiro Tamada ,  Masao Takahashi ,  Takao Maruyama

    IPC分类号： H01L27/08

    CPC分类号： H01L29/8611 ,  H01L27/0814

    摘要： A serially-connected diode pair made of diodes having a high withstand voltage and a low on-resistance is formed based on a high withstand voltage vertical PNP bipolar transistor process technology. Two of the diode pairs are connected in parallel to form a bridge so that there is formed a high-efficiency full-wave rectifier circuit that is free from a leakage current due to a parasitic transistor. The serially-connected diode pair is formed by connecting a diode composed of a P type semiconductor substrate, that makes an anode, and an N type buried layer, that makes a cathode, and a diode composed of a P+ type conductive layer, that makes an anode, and an N type epitaxial layer, that makes a cathode, in series with an electrode AC1. An N+ type buried layer and an N+ type conductive layer are foamed to prevent an electric potential at the N+ type buried layer from becoming lower than an electric potential at a P+ type buried layer even when a large positive voltage is applied to the electrode AC1, so as to prevent a parasitic PNP transistor composed of the P+ type buried layer, the N+ type buried layer and the P type semiconductor substrate, that make an emitter, a base and a collector, respectively, from turning on.

    摘要翻译： 基于高耐压垂直PNP双极晶体管工艺技术，形成具有高耐受电压和低导通电阻的二极管串联二极管对。 两个二极管对并联连接形成桥，从而形成一个高效全波整流电路，该电路由于寄生晶体管而没有漏电流。 串联连接的二极管对通过连接由构成阳极的P型半导体衬底和形成阴极的N型掩埋层构成的二极管和由P +型导电层构成的二极管来形成， 阳极和N型外延层，其形成与电极AC1串联的阴极。 即使对电极AC1施加大的正电压，N +型掩埋层和N +型导电层发泡，以防止N +型掩埋层的电位变得低于P +型掩埋层的电位， 以防止分别形成发射极，基极和集电极的由P +型掩埋层，N +型掩埋层和P型半导体基板构成的寄生PNP晶体管导通。

    Bearing device
    9.
    发明申请
    Bearing device 有权
    轴承装置

    公开(公告)号：US20100247011A1

    公开(公告)日：2010-09-30

    申请号：US12592915

    申请日：2009-12-04

    申请人： Yukitaka Muramoto ,  Masaru Kondo ,  Yasuaki Goto ,  Masao Takahashi

    发明人： Yukitaka Muramoto ,  Masaru Kondo ,  Yasuaki Goto ,  Masao Takahashi

    IPC分类号： F16C17/04

    CPC分类号： F16C33/046 ,  F16C17/04 ,  F16C35/02 ,  F16C41/008 ,  F16C2360/22

    摘要： In a bearing device 1, annular recesses 3a and 6a that house a thrust bearing 7 are formed in side surfaces of a housing 3 and a cap 6, a rotation preventing protrusion 12b is provided in an outer periphery of a lower side half-split thrust bearing 12 in the thrust bearing 7, and a rotation preventing groove 6b into which the rotation preventing protrusion 12b fits is formed in the annular recess 6a formed in the cap 6. The rotation preventing groove 6b is formed to be deeper than the annular recess 6a, and in a surface of the lower side half-split thrust bearing 12 on the side of the crank arm, a groove 12c is formed from the rotation preventing protrusion 12b to an inner peripheral portion of the lower side half-split thrust bearing 12. This can prevent partial contact of the thrust bearing, and prevent breakage due to stress concentration as much as possible.

    摘要翻译： 在轴承装置1中，容纳推力轴承7的环形凹部3a，6a形成在壳体3和盖6的侧面，防转动突起12b设置在下侧半分离推力 推力轴承7中的轴承12和形成在盖6中的环形凹部6a中形成有防止旋转突起12b嵌合的防旋转槽6b。防旋转槽6b形成为比环形凹部6a更深 ，并且在曲柄臂一侧的下侧半剖分推力轴承12的表面中，从防旋转突起12b向下侧半剖分推力轴承12的内周部形成有槽12c。 这可以防止推力轴承的部分接触，并且尽可能地防止由于应力集中而导致的断裂。

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20090206376A1

    公开(公告)日：2009-08-20

    申请号：US12333418

    申请日：2008-12-12

    申请人： Keiji Mita ,  Masao Takahashi ,  Takao Arai

    发明人： Keiji Mita ,  Masao Takahashi ,  Takao Arai

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7322 ,  H01L29/735 ,  H01L29/8618

    摘要： A conventional semiconductor device has a problem that, when a vertical PNP transistor as a power semiconductor element is used in a saturation region, a leakage current into a substrate is generated. In a semiconductor device of the present invention, two P type diffusion layers as a collector region are formed around an N type diffusion layer as a base region. One of the P type diffusion layers is formed to have a lower impurity concentration and a narrower diffusion width than the other P type diffusion layer. In this structure, when a vertical PNP transistor is turned on, a region where the former P type diffusion layer is formed mainly serves as a parasite current path. Thus, a parasitic transistor constituted of a substrate, an N type buried layer and a P type buried layer is prevented from turning on, and a leakage current into the substrate is prevented.

    摘要翻译： 常规的半导体器件具有以下问题：当在饱和区域中使用作为功率半导体元件的垂直PNP晶体管时，产生进入衬底的漏电流。 在本发明的半导体器件中，以N型扩散层为基底形成作为集电极区域的2个P型扩散层。 P型扩散层中的一个形成为具有比其他P型扩散层更低的杂质浓度和更窄的扩散宽度。 在这种结构中，当垂直PNP晶体管导通时，形成前者P型扩散层的区域主要用作寄生电流路径。 因此，防止由衬底，N型掩埋层和P型掩埋层构成的寄生晶体管导通，并且防止了进入衬底的漏电流。