公开(公告)号：US08455940B2

公开(公告)日：2013-06-04

申请号：US13100488

申请日：2011-05-04

申请人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

IPC分类号： H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/66477 ,  H01L29/7926

摘要： A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.

摘要翻译： 非易失性存储器件包括衬底，从衬底突出的沟道层，围绕沟道层的栅极导电层，设置在沟道层和栅极导电层之间的栅极绝缘层以及与沟道间隔开的第一绝缘层 并设置在栅极导电层的顶部和底部。 栅极绝缘层在栅极导电层和第一绝缘层之间延伸。

公开(公告)号：US20130252391A1

公开(公告)日：2013-09-26

申请号：US13896819

申请日：2013-05-17

申请人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

IPC分类号： H01L29/66

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/66477 ,  H01L29/7926

摘要： A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.

公开(公告)号：US20150060993A1

公开(公告)日：2015-03-05

申请号：US14529940

申请日：2014-10-31

申请人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

IPC分类号： H01L27/115 ,  H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/66477 ,  H01L29/7926

摘要： A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.

摘要翻译： 非易失性存储器件包括衬底，从衬底突出的沟道层，围绕沟道层的栅极导电层，设置在沟道层和栅极导电层之间的栅极绝缘层以及与沟道间隔开的第一绝缘层 并设置在栅极导电层的顶部和底部。 栅极绝缘层在栅极导电层和第一绝缘层之间延伸。

公开(公告)号：US08877626B2

公开(公告)日：2014-11-04

申请号：US13896819

申请日：2013-05-17

申请人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Lee ,  Sang-yong Park

IPC分类号： H01L21/3205 ,  H01L27/115 ,  H01L29/66 ,  H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/66477 ,  H01L29/7926

摘要： A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.

摘要翻译： 非易失性存储器件包括衬底，从衬底突出的沟道层，围绕沟道层的栅极导电层，设置在沟道层和栅极导电层之间的栅极绝缘层以及与沟道间隔开的第一绝缘层 并设置在栅极导电层的顶部和底部。 栅极绝缘层在栅极导电层和第一绝缘层之间延伸。

公开(公告)号：US20110287612A1

公开(公告)日：2011-11-24

申请号：US13100488

申请日：2011-05-04

申请人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Iee ,  Sang-yong Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Byung-kwan You ,  Dong-sik Iee ,  Sang-yong Park

IPC分类号： H01L21/20

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/66477 ,  H01L29/7926

摘要： A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.

摘要翻译： 非易失性存储器件包括衬底，从衬底突出的沟道层，围绕沟道层的栅极导电层，设置在沟道层和栅极导电层之间的栅极绝缘层以及与沟道间隔开的第一绝缘层 并设置在栅极导电层的顶部和底部。 栅极绝缘层在栅极导电层和第一绝缘层之间延伸。

公开(公告)号：US20110260237A1

公开(公告)日：2011-10-27

申请号：US13042051

申请日：2011-03-07

申请人： Jae-goo Lee ,  Jung-dal Choi ,  Young-woo Park

发明人： Jae-goo Lee ,  Jung-dal Choi ,  Young-woo Park

IPC分类号： H01L29/792 ,  H01L29/78

CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： A memory device includes a substrate, a semiconductor column extending perpendicularly from the substrate and a plurality of spaced-apart charge storage cells disposed along a sidewall of the semiconductor column. Each of the storage cells includes a tunneling insulating layer disposed on the sidewall of the semiconductor column, a polymer layer disposed on the tunneling insulating layer, a plurality of quantum dots disposed on or in the polymer layer and a blocking insulating layer disposed on the polymer layer.

摘要翻译： 存储器件包括衬底，从衬底垂直延伸的半导体柱和沿着半导体柱的侧壁设置的多个间隔开的电荷存储单元。 每个存储单元包括设置在半导体柱的侧壁上的隧道绝缘层，设置在隧道绝缘层上的聚合物层，设置在聚合物层上或其中的多个量子点以及设置在聚合物上的阻挡绝缘层 层。

公开(公告)号：US09748261B2

公开(公告)日：2017-08-29

申请号：US14832285

申请日：2015-08-21

申请人： Jae-goo Lee ,  Young-woo Park

发明人： Jae-goo Lee ,  Young-woo Park

IPC分类号： H01L21/336 ,  H01L27/11582 ,  H01L21/28 ,  H01L27/11575

CPC分类号： H01L27/11582 ,  H01L21/28282 ,  H01L27/11575

摘要： A method of fabricating a memory device includes alternately stacking a plurality of insulating layers and a plurality of sacrificial layers on a substrate, forming a channel hole by etching the insulating layers and the sacrificial layers to expose a partial region of the substrate, forming a channel structure in the channel hole, forming an opening by etching the insulating layers and the sacrificial layers to exposed a portion of the substrate, forming a plurality of side openings that include first side openings and a second side opening by removing the sacrificial layers through the opening, forming gate electrodes to fill the first side openings, and forming a blocking layer to fill the second side opening.

公开(公告)号：US20150008499A1

公开(公告)日：2015-01-08

申请号：US14267909

申请日：2014-05-02

申请人： Jae-goo Lee ,  Young-woo Park ,  Jin-taek Park

发明人： Jae-goo Lee ,  Young-woo Park ,  Jin-taek Park

IPC分类号： H01L29/78 ,  H01L29/792 ,  H01L29/788

CPC分类号： H01L27/11582 ,  H01L23/5226 ,  H01L27/11273 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L29/785 ,  H01L29/7889 ,  H01L29/7926

摘要： A vertical semiconductor device includes a channel structure extending from a substrate in a first direction perpendicular to an upper surface of the substrate, and a ground selection line, word lines, and a string selection line sequentially formed on a side surface of the channel structure in the first direction to be separated from one another. The channel structure includes a protruding region formed in a side wall portion of the channel structure between the ground selection line and the upper surface of the substrate, the protruding region protruding in a horizontal direction perpendicular to the first direction.

摘要翻译： 垂直半导体器件包括从垂直于衬底的上表面的第一方向上从衬底延伸的沟道结构，以及顺序地形成在沟道结构的侧表面上的接地选择线，字线和串选择线 第一个要相互分离的方向。 通道结构包括形成在通道结构的侧壁部分之间的突出区域，其在接地选择线和衬底的上表面之间，突出区域在与第一方向垂直的水平方向上突出。

公开(公告)号：US08969947B2

公开(公告)日：2015-03-03

申请号：US13042051

申请日：2011-03-07

申请人： Jae-goo Lee ,  Jung-dal Choi ,  Young-woo Park

发明人： Jae-goo Lee ,  Jung-dal Choi ,  Young-woo Park

IPC分类号： H01L29/788 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/792 ,  H01L27/115 ,  B82Y10/00

CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11578 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： A memory device includes a substrate, a semiconductor column extending perpendicularly from the substrate and a plurality of spaced-apart charge storage cells disposed along a sidewall of the semiconductor column. Each of the storage cells includes a tunneling insulating layer disposed on the sidewall of the semiconductor column, a polymer layer disposed on the tunneling insulating layer, a plurality of quantum dots disposed on or in the polymer layer and a blocking insulating layer disposed on the polymer layer.

摘要翻译： 存储器件包括衬底，从衬底垂直延伸的半导体柱和沿着半导体柱的侧壁设置的多个间隔开的电荷存储单元。 每个存储单元包括设置在半导体柱的侧壁上的隧道绝缘层，设置在隧道绝缘层上的聚合物层，设置在聚合物层上或其中的多个量子点以及设置在聚合物上的阻挡绝缘层 层。

公开(公告)号：US09093038B2

公开(公告)日：2015-07-28

申请号：US12784200

申请日：2010-05-20

申请人： Byung-hun Han ,  Jae-goo Lee

发明人： Byung-hun Han ,  Jae-goo Lee

IPC分类号： G09G3/36 ,  G09G3/32

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G3/3696 ,  G09G2330/02

摘要： A voltage stabilizer circuit for alternately or simultaneously stabilizing first and second generated voltages includes shared capacitor connected between the first and second generated voltages. The voltage stabilizer circuit may further include first and second switches for alternately connecting the first and second electrode of the shared capacitor to a ground. The alternation of the stabilized first and second voltages output by the voltage stabilizer circuit can be synchronized with a pixel polarity inversion mode signal output by the internal driver circuit of an LCD display.

摘要翻译： 用于交替或同时稳定第一和第二产生电压的稳压器电路包括连接在第一和第二产生电压之间的共享电容器。 电压稳定器电路还可以包括用于将共享电容器的第一和第二电极交替地连接到地的第一和第二开关。 由稳压器电路输出的稳定的第一和第二电压的交替可与由LCD显示器的内部驱动电路输出的像素极性反转模式信号同步。