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    Methods of fabricating metal-insulator-metal capacitors with a chemical barrier layer in a lower electrode
    3.
    发明授权
    Methods of fabricating metal-insulator-metal capacitors with a chemical barrier layer in a lower electrode 有权
    在下电极中制造具有化学阻挡层的金属 - 绝缘体 - 金属电容器的方法

    公开(公告)号：US07655519B2

    公开(公告)日：2010-02-02

    申请号：US11216639

    申请日：2005-09-01

    申请人： Eun-ae Chung ,  Jae-hyoung Choi ,  Jung-hee Chung ,  Young-sun Kim ,  Cha-young Yoo

    发明人： Eun-ae Chung ,  Jae-hyoung Choi ,  Jung-hee Chung ,  Young-sun Kim ,  Cha-young Yoo

    IPC分类号： H01L21/8242

    CPC分类号： H01L21/7687 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/75

    摘要： A metal-insulator-metal (MIM) capacitor includes a lower electrode, a dielectric layer, and an upper electrode. The lower electrode includes a first conductive layer, a chemical barrier layer on the first conductive layer, and a second conductive layer on the chemical barrier layer. The chemical barrier layer is between the first and second conductive layers and is a different material than the first and second conductive layers. The dielectric layer is on the lower electrode. The upper electrode is on the dielectric layer opposite to the lower electrode. The first and second conductive layers can have the same thickness. The chemical barrier layer can be thinner than each of the first and second conductive layers. Related methods are discussed.

    摘要翻译： 金属绝缘体金属（MIM）电容器包括下电极，电介质层和上电极。 下电极包括第一导电层，第一导电层上的化学阻挡层和化学阻挡层上的第二导电层。 化学屏障层位于第一和第二导电层之间，并且是与第一和第二导电层不同的材料。 介电层位于下电极上。 上电极位于与下电极相对的电介质层上。 第一和第二导电层可以具有相同的厚度。 化学阻挡层可以比第一和第二导电层中的每一个薄。 讨论相关方法。

    METHODS OF FORMING INTEGRATED CIRCUIT CAPACITORS HAVING COMPOSITE DIELECTRIC LAYERS THEREIN CONTAINING CRYSTALLIZATION INHIBITING REGIONS
    6.
    发明申请
    METHODS OF FORMING INTEGRATED CIRCUIT CAPACITORS HAVING COMPOSITE DIELECTRIC LAYERS THEREIN CONTAINING CRYSTALLIZATION INHIBITING REGIONS 审中-公开
    形成具有包含结晶区域的复合介电层的集成电路电容器的方法

    公开(公告)号：US20130130465A1

    公开(公告)日：2013-05-23

    申请号：US13716901

    申请日：2012-12-17

    申请人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoo Oh

    发明人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoo Oh

    IPC分类号： H01L29/92

    CPC分类号： H01L29/92 ,  H01L27/10852 ,  H01L28/40

    摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

    摘要翻译： 集成电路电容器在其中具有复合电介质层。 这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。 集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。 电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。 电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

    Capacitors having composite dielectric layers containing crystallization inhibiting regions
    10.
    发明授权
    Capacitors having composite dielectric layers containing crystallization inhibiting regions 有权
    具有包含结晶抑制区域的复合电介质层的电容器

    公开(公告)号：US07973352B2

    公开(公告)日：2011-07-05

    申请号：US12754713

    申请日：2010-04-06

    申请人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    发明人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    IPC分类号： H01L29/94

    CPC分类号： H01L29/92 ,  H01L27/10852 ,  H01L28/40

    摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

    摘要翻译： 集成电路电容器在其中具有复合电介质层。 这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。 集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。 电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。 电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。