公开(公告)号：US08178946B1

公开(公告)日：2012-05-15

申请号：US12623325

申请日：2009-11-20

申请人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

发明人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

IPC分类号： H01L29/00

CPC分类号： H01L29/155 ,  H01L29/201 ,  H01L29/7373

摘要： A heterojunction bipolar transistor (HBT) having an emitter, a base, and a collector, the base including a first semiconductor layer coupled to the collector, the first semiconductor layer having a first bandgap between a first conduction band and a first valence band and a second semiconductor layer coupled to the first semiconductor layer and having a second bandgap between a second conduction band and a second valence band, wherein the second valence band is higher than the first valence band and wherein the second semiconductor layer comprises a two dimensional hole gas and a third semiconductor layer coupled to the second semiconductor layer and having a third bandgap between a third conduction band and a third valence band, wherein the third valence band is lower than the second valence band and wherein the third semiconductor layer is coupled to the emitter.

摘要翻译： 具有发射极，基极和集电极的异质结双极晶体管（HBT），所述基极包括耦合到集电极的第一半导体层，所述第一半导体层在第一导带和第一价带之间具有第一带隙， 第二半导体层，其耦合到所述第一半导体层，并且在第二导带和第二价带之间具有第二带隙，其中所述第二价带高于所述第一价带，并且其中所述第二半导体层包括二维空穴气体， 耦合到所述第二半导体层并且在第三导带和第三价带之间具有第三带隙的第三半导体层，其中所述第三价带低于所述第二价带，并且其中所述第三半导体层耦合到所述发射极。

公开(公告)号：US07868335B1

公开(公告)日：2011-01-11

申请号：US12193436

申请日：2008-08-18

申请人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

发明人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

IPC分类号： H01L21/20

CPC分类号： H01L29/7371 ,  H01L29/155 ,  H01L29/365

摘要： A bipolar junction transistor having an emitter, a base, and a collector includes a stack of one or more layer sets adjacent the collector. Each layer set includes a first material having a first band gap, wherein the first material is highly doped, and a second material having a second band gap narrower than the first band gap, wherein the second material is at most lightly doped.

摘要翻译： 具有发射极，基极和集电极的双极结型晶体管包括与集电极相邻的一个或多个层组的叠层。 每个层组包括具有第一带隙的第一材料，其中所述第一材料是高度掺杂的，以及具有比所述第一带隙窄的第二带隙的第二材料，其中所述第二材料最多是轻掺杂的。

公开(公告)号：US08957455B1

公开(公告)日：2015-02-17

申请号：US13438810

申请日：2012-04-03

申请人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

发明人： James Chingwei Li ,  Marko Sokolich ,  Tahir Hussain ,  David H. Chow

IPC分类号： H01L29/737

CPC分类号： H01L29/155 ,  H01L29/201 ,  H01L29/7373

摘要： A heterojunction bipolar transistor (HBT) having an emitter, a base, and a collector, the base including a first semiconductor layer coupled to the collector, the first semiconductor layer having a first bandgap between a first conduction band and a first valence band and a second semiconductor layer coupled to the first semiconductor layer and having a second bandgap between a second conduction band and a second valence band, wherein the second valence band is higher than the first valence band and wherein the second semiconductor layer comprises a two dimensional hole gas and a third semiconductor layer coupled to the second semiconductor layer and having a third bandgap between a third conduction band and a third valence band, wherein the third valence band is lower than the second valence band and wherein the third semiconductor layer is coupled to the emitter.

摘要翻译： 具有发射极，基极和集电极的异质结双极晶体管（HBT），所述基极包括耦合到集电极的第一半导体层，所述第一半导体层在第一导带和第一价带之间具有第一带隙， 第二半导体层，其耦合到所述第一半导体层，并且在第二导带和第二价带之间具有第二带隙，其中所述第二价带高于所述第一价带，并且其中所述第二半导体层包括二维空穴气体， 耦合到所述第二半导体层并且在第三导带和第三价带之间具有第三带隙的第三半导体层，其中所述第三价带低于所述第二价带，并且其中所述第三半导体层耦合到所述发射极。

公开(公告)号：US07531851B1

公开(公告)日：2009-05-12

申请号：US11713070

申请日：2007-02-28

申请人： Rajesh D. Rajavel ,  Mary Y. Chen ,  Steven S. Bui ,  David H. Chow ,  James Chingwei Li ,  Mehran Mokhtari ,  Marko Sokolich

发明人： Rajesh D. Rajavel ,  Mary Y. Chen ,  Steven S. Bui ,  David H. Chow ,  James Chingwei Li ,  Mehran Mokhtari ,  Marko Sokolich

IPC分类号： H01L31/0328

CPC分类号： H01L29/7371 ,  H01L27/0605 ,  H01L29/0821 ,  H01L29/66318 ,  Y10S438/906

摘要： An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer supported by the As-based nucleation layer, a base layer supported by the collector layer, an emitter layer and a base contact supported by the base layer, an emitter cap layer supported by the emitter layer, an emitter contact supported by the emitter cap layer, and a collector contact supported by the sub-collector. A method provides for selecting a first InP layer, forming an As-based nucleation layer on the first InP layer, and epitaxially growing a second InP layer on the As-based nucleation layer.

摘要翻译： 电子器件包含衬底，由衬底支撑的子集电极，具有选择性注入的掩埋子集电极并由子集电极支撑的未掺杂层，由未掺杂的部分支撑的基于As的成核层 由As基成核层支撑的集电体层，由集电极层支撑的基极层，由基极层支撑的发射极层和基极接触，由发射极层支撑的发射极盖层，负极 由发射极盖层和由集电极支撑的集电极触点。 一种方法提供选择第一InP层，在第一InP层上形成基于As的成核层，以及在As基成核层上外延生长第二InP层。

公开(公告)号：US07582536B1

公开(公告)日：2009-09-01

申请号：US12191482

申请日：2008-08-14

申请人： Rajesh D. Rajavel ,  Mary Y. Chen ,  Steven S. Bui ,  David H. Chow ,  James Chingwei Li ,  Mehran Mokhtari ,  Marko Sokolich

发明人： Rajesh D. Rajavel ,  Mary Y. Chen ,  Steven S. Bui ,  David H. Chow ,  James Chingwei Li ,  Mehran Mokhtari ,  Marko Sokolich

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/7371 ,  H01L27/0605 ,  H01L29/0821 ,  H01L29/66318 ,  Y10S438/906

摘要： An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer supported by the As-based nucleation layer, a base layer supported by the collector layer, an emitter layer and a base contact supported by the base layer, an emitter cap layer supported by the emitter layer, an emitter contact supported by the emitter cap layer, and a collector contact supported by the sub-collector. A method provides for selecting a first InP layer, forming an As-based nucleation layer on the first InP layer, and epitaxially growing a second InP layer on the As-based nucleation layer.

公开(公告)号：US07470619B1

公开(公告)日：2008-12-30

申请号：US11607494

申请日：2006-12-01

申请人： Mary Y. Chen ,  James Chingwei Li ,  Philip H. Lawyer ,  Marko Sokolich

发明人： Mary Y. Chen ,  James Chingwei Li ,  Philip H. Lawyer ,  Marko Sokolich

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L21/76885

摘要： Described is a method for forming a stackable interconnect. The interconnect is formed by depositing a first contact on a substrate; depositing a seed layer (SL) on the substrate; depositing a metal mask layer (MML) on the SL; depositing a bottom anti-reflection coating (BARC) on the MML; forming a photoresist layer (PR) on the BARC; removing a portion of the PR; etching the BARC and the MML to expose the SL; plating the exposed SL to form a first plated plug; removing the layers to expose the SL; removing an unplated portion of the SL; depositing an inter layer dielectric (ILD) on the interconnect; etching back the ILD to expose the first plated plug; and depositing a second contact on the first plated plug. Using the procedures described above, a second plated plug is then formed on the first plated plug to form the stackable plugged via interconnect.

摘要翻译： 描述了形成可堆叠互连的方法。 互连通过在衬底上沉积第一接触而形成; 将籽晶层（SL）沉积在基底上; 在SL上沉积金属掩模层（MML）; 在MML上沉积底部防反射涂层（BARC）; 在BARC上形成光致抗蚀剂层（PR）; 删除PR的一部分; 蚀刻BARC和MML以暴露SL; 电镀暴露的SL以形成第一电镀塞; 去除层以露出SL; 去除SL的未平坦部分; 在所述互连上沉积层间电介质（ILD）; 蚀刻ILD以露出第一镀层插头; 以及在所述第一电镀插头上沉积第二触点。 使用上述步骤，然后在第一镀层插头上形成第二电镀塞，以形成经由互连的可堆叠插入。

公开(公告)号：US07576409B1

公开(公告)日：2009-08-18

申请号：US11202001

申请日：2005-08-10

申请人： Mary Chen ,  Marko Sokolich

发明人： Mary Chen ,  Marko Sokolich

IPC分类号： H01L31/0328

CPC分类号： H01L29/7371 ,  H01L27/0605 ,  H01L29/0821 ,  H01L29/36 ,  H01L29/66318

摘要： A wafer comprising at least one high Ft HBT and at least one high BVceo HBT having various collector profiles on a common III-V compound semiconductor based wafer. The N+ implant in the collector varies the collector profiles of individual HBTs on the wafer. The method for preparing the device comprises forming of HBT layers up to and including collector layer on non-silicon based substrate, performing ion implantation, annealing for implant activation, and forming remaining HBT layers.

摘要翻译： 包括至少一个高Ft HBT和至少一个高BVceo HBT的晶片，其在共同的III-V化合物半导体晶片上具有各种集电极分布。 收集器中的N +注入会改变晶片上各个HBT的集电极分布。 制备该器件的方法包括在非硅基衬底上形成直至并包括集电极层的HBT层，执行离子注入，用于注入激活的退火和形成剩余的HBT层。

公开(公告)号：US5471077A

公开(公告)日：1995-11-28

申请号：US774503

申请日：1991-10-10

申请人： Marko Sokolich

发明人： Marko Sokolich

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L29/47 ,  H01L29/778 ,  H01L29/161 ,  H01L29/205 ,  H01L29/48 ,  H01L29/56

CPC分类号： H01L29/66462 ,  H01L21/28581 ,  H01L29/475 ,  H01L29/7787

摘要： A high electron mobility transistor (HEMT) includes a diffusion barrier (22) to prevent gate metal (20) diffusion into the substrate (12) during fabrication and a sacrificial platinum alloy layer (30) forms the Schottky barrier. A method of forming a HEMT includes forming a diffusion barrier of titanium nitride on a platinum layer and applying sufficient heat to cause the platinum layer to alloy with the gallium arsenide layer forming a platinum gallium and platinum arsenide alloy layer and Schottky barrier. Since all platinum is consumed, this method permits precise control of the thickness of the gate layer and eliminates diffusion of the platinum gate layer into the gallium arsenide layer during later processing steps.

摘要翻译： 高电子迁移率晶体管（HEMT）包括在制造期间防止栅极金属（20）扩散到衬底（12）中的扩散阻挡层（22），并且牺牲铂合金层（30）形成肖特基势垒。 形成HEMT的方法包括在铂层上形成氮化钛的扩散阻挡层，并施加足够的热量以使铂层与形成铂镓和砷化铂合金层和肖特基势垒的砷化镓层合金化。 由于所有铂被消耗，所以该方法允许精确地控制栅极层的厚度，并且消除后续处理步骤期间铂栅极层进入砷化镓层的扩散。

公开(公告)号：US5502325A

公开(公告)日：1996-03-26

申请号：US453940

申请日：1995-05-30

申请人： Marko Sokolich ,  Hiroyuki Yamasaki ,  Huai-Tung Yang

发明人： Marko Sokolich ,  Hiroyuki Yamasaki ,  Huai-Tung Yang

IPC分类号： G01R33/09 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12 ,  H01L29/82 ,  H01L43/00

CPC分类号： H01L43/12 ,  H01L27/22

摘要： A magnetoresistor is monolithically integrated with an active circuit by growing a thin film magnetoresistor on a semiconductor substrate after the substrate has been doped and annealed for the active devices. The magnetoresistor is grown through a window in a mask, with the mask and magnetoresistor materials selected such that the magnetoresistor is substantially non-adherent to the mask. InSb is preferred for the magnetoresistor, Si.sub.3 N.sub.4 for the mask and GaAs for the substrate. The non-adherence allows the mask to be substantially thinner than the magnetoresistor without impairing the removal of the mask after the magnetoresistor has been established.

摘要翻译： 在将衬底掺杂并退火用于有源器件之后，通过在半导体衬底上生长薄膜磁阻电阻器，将磁敏电阻器与有源电路单片集成。 磁阻电阻器通过掩模中的窗口生长，其中掩模和磁电阻材料被选择为使得磁阻器基本上与掩模不粘附。 InSb优选用于磁电阻，用于掩模的Si 3 N 4和用于衬底的GaAs。 非粘附性允许掩模在磁阻电阻器建立之后基本上比磁敏电阻器薄，而不会损害掩模的去除。

公开(公告)号：US20100059793A1

公开(公告)日：2010-03-11

申请号：US12616374

申请日：2009-11-11

申请人： Mary Chen ,  Marko Sokolich

发明人： Mary Chen ,  Marko Sokolich

IPC分类号： H01L27/082 ,  H01L21/8222

CPC分类号： H01L29/7371 ,  H01L27/0605 ,  H01L29/0821 ,  H01L29/36 ,  H01L29/66318

摘要： A wafer comprising at least one emitter-up Heterojunction Bipolar Transistor (HBT) and at least one emitter-down HBT on a common InP based semiconductor wafer. Isolation and N-type implants into the device layers differentiate an emitter-down HBT from an emitter-up HBT. The method for preparing a device comprises forming identical layers for all HBTs and performing ion implantation to differentiate an emitter-down HBT from an emitter-up HBT.

摘要翻译： 包括至少一个发射极向上异质结双极晶体管（HBT）的晶片和在基于公共InP的半导体晶片上的至少一个发射极 - 向下的HBT。 器件层中的隔离和N型植入物将发射极向下的HBT与发射体向上的HBT区分开来。 制备器件的方法包括为所有HBT形成相同的层，并执行离子注入以将发射极向下的HBT与发射极向上的HBT区分开来。