Protect diodes for hybrid-orientation substrate structures
    1.
    发明授权
    Protect diodes for hybrid-orientation substrate structures 失效
    用于混合取向衬底结构的保护二极管

    公开(公告)号:US07687340B2

    公开(公告)日:2010-03-30

    申请号:US11849489

    申请日:2007-09-04

    IPC分类号: H01L21/8234

    摘要: A semiconductor structure fabrication method. First, a semiconductor structure is provided including (a) a semiconductor block having a first semiconductor material doped with a first doping polarity and having a first lattice orientation, and (b) a semiconductor region on the semiconductor block, wherein the semiconductor region is physically isolated from the semiconductor block by a dielectric region, and wherein the semiconductor region includes a second semiconductor material (i) doped with a second doping polarity opposite to the first doping polarity and (ii) having a second lattice orientation different from the first lattice orientation. Next, first and second gate stacks are formed on the semiconductor block and the semiconductor region, respectively. Then, (i) first and second S/D regions are simultaneously formed in the semiconductor block on opposing sides of the first gate stack and (ii) first and second discharge prevention semiconductor regions in the semiconductor block.

    摘要翻译: 半导体结构制造方法。 首先,提供半导体结构,其包括:(a)具有掺杂有第一掺杂极性且具有第一晶格取向的第一半导体材料的半导体块,以及(b)半导体块上的半导体区域,其中半导体区域是物理上的 并且其中所述半导体区域包括掺杂有与所述第一掺杂极性相反的第二掺杂极性的第二半导体材料(i)和(ii)具有不同于所述第一晶格取向的第二晶格取向 。 接下来,分别在半导体块和半导体区域上形成第一和第二栅极叠层。 然后,(i)第一和第二S / D区域同时形成在半导体块中的第一栅极堆叠的相对侧上,以及(ii)半导体块中的第一和第二放电预防半导体区域。

    Gate prespacers for high density, high performance DRAMs
    2.
    发明授权
    Gate prespacers for high density, high performance DRAMs 失效
    用于高密度,高性能DRAM的Gate Prepacers

    公开(公告)号:US06326260B1

    公开(公告)日:2001-12-04

    申请号:US09599703

    申请日:2000-06-22

    IPC分类号: H01L218242

    摘要: A memory device structure is provided in which the array oxide layer has a thickness that is greater than the thickness of the support oxide layer. Specifically, the structure comprises a semiconductor substrate having a gate oxide layer formed thereon, said substrate including array regions and support regions, said array regions include at least one patterned gate conductor, said patterned gate conductor having a polysilicon layer formed on said gate oxide layer, a conductor material layer formed on said polysilicon layer, and a nitride cap layer formed on said conductor material layer, said nitride cap layer and said conductor material layer having spacers formed on sidewalls thereof and said polysilicon layer having an array oxide layer formed on sidewalls thereof, said spacers being substantially flush with the oxide sidewalls, said support regions include at least one patterned gate conductor, said patterned gate conductor having a polysilicon layer formed on said gate oxide layer, a conductor material layer formed on said polysilicon layer, and a nitride cap layer on said conductor material layer, said polysilicon layer having a support oxide layer formed on sidewalls thereof, wherein said array oxide layer has a thickness that is greater than said support oxide layer.

    摘要翻译: 提供了一种存储器件结构,其中阵列氧化物层的厚度大于支撑氧化物层的厚度。 具体地,该结构包括其上形成有栅极氧化层的半导体衬底,所述衬底包括阵列区域和支撑区域,所述阵列区域包括至少一个图案化栅极导体,所述图案化栅极导体具有形成在所述栅极氧化物层上的多晶硅层 形成在所述多晶硅层上的导体材料层和形成在所述导体材料层上的氮化物覆盖层,所述氮化物覆盖层和所述导体材料层具有形成在其侧壁上的隔离物,并且所述多晶硅层具有形成在侧壁上的阵列氧化物层 所述间隔件与氧化物侧壁基本齐平,所述支撑区域包括至少一个图案化栅极导体,所述图案化栅极导体具有形成在所述栅极氧化物层上的多晶硅层,形成在所述多晶硅层上的导体材料层,以及 所述多晶硅层在所述导体材料层上形成氮化物覆盖层 形成在其侧壁上的支撑氧化物层,其中所述阵列氧化物层的厚度大于所述支撑氧化物层。

    PHOTOLITHOGRAPHY MASK WITH PROTECTIVE SILICIDE CAPPING LAYER
    3.
    发明申请
    PHOTOLITHOGRAPHY MASK WITH PROTECTIVE SILICIDE CAPPING LAYER 审中-公开
    具有保护性硅胶覆盖层的光刻胶面板

    公开(公告)号:US20080261121A1

    公开(公告)日:2008-10-23

    申请号:US11738004

    申请日:2007-04-20

    IPC分类号: G03C5/00 G03F1/00

    CPC分类号: G03F1/30 G03F1/48 G03F1/54

    摘要: A photomask and a method of fabricating the photomask. The photomask including: a substrate transparent to a selected wavelength or wavelengths of radiation, the substrate having a top surface and an opposite bottom surface, the substrate having a printable region and a non-printable region; the printable region having first opaque regions raised above the top surface of the substrate adjacent to clear regions, each opaque region of the first opaque regions having sidewalls and opposite top and bottom surfaces, the first opaque regions including a metal; the non-printable region including metal second opaque region raised above the top surface of the substrate, the second opaque region having sidewalls and opposite top and bottom surface, the second opaque regions including the metal; and a conformal protective metal oxide capping layer on top surfaces and sidewalls of the first and second opaque regions. The conformal layer is formed by oxidation.

    摘要翻译: 光掩模和制造光掩模的方法。 所述光掩模包括:对所选择的波长或辐射波长透明的衬底,所述衬底具有顶表面和相对的底表面,所述衬底具有可打印区域和不可打印区域; 所述可印刷区域具有在所述基板的与所述透明区域相邻的顶表面上方的第一不透明区域,所述第一不透明区域的每个不透明区域具有侧壁和相对的顶表面和底表面,所述第一不透明区域包括金属; 所述不可打印区域包括在所述基板的顶表面上方升高的金属第二不透明区域,所述第二不透明区域具有侧壁和相对的顶部和底部表面,所述第二不透明区域包括所述金属; 以及在第一和第二不透明区域的顶表面和侧壁上的共形保护性金属氧化物覆盖层。 保形层通过氧化形成。

    PHOTOLITHOGRAPHY MASK WITH INTEGRALLY FORMED PROTECTIVE CAPPING LAYER
    4.
    发明申请
    PHOTOLITHOGRAPHY MASK WITH INTEGRALLY FORMED PROTECTIVE CAPPING LAYER 审中-公开
    具有整体形成的保护层的光刻胶面板

    公开(公告)号:US20080261120A1

    公开(公告)日:2008-10-23

    申请号:US11737956

    申请日:2007-04-20

    IPC分类号: G03C5/00 G03F1/00

    CPC分类号: G03F1/30 G03F1/48 G03F1/54

    摘要: A photomask and a method of fabricating the photomask. The photomask including: a substrate transparent to a selected wavelength or wavelengths of radiation, the substrate having a top surface and an opposite bottom surface, the substrate having a printable region and a non-printable region; the printable region having first opaque regions raised above the top surface of the substrate adjacent to clear regions, each opaque region of the first opaque regions having sidewalls and opposite top and bottom surfaces, the first opaque regions including a metal; the non-printable region including metal second opaque region raised above the top surface of the substrate, the second opaque region having sidewalls and opposite top and bottom surface, the second opaque regions including the metal; and a conformal protective metal oxide capping layer on top surfaces and sidewalls of the first and second opaque regions. The conformal layer is formed by oxidation.

    摘要翻译: 光掩模和制造光掩模的方法。 所述光掩模包括:对所选择的波长或辐射波长透明的衬底,所述衬底具有顶表面和相对的底表面,所述衬底具有可打印区域和不可打印区域; 所述可印刷区域具有在所述基板的与所述透明区域相邻的顶表面上方的第一不透明区域,所述第一不透明区域的每个不透明区域具有侧壁和相对的顶表面和底表面,所述第一不透明区域包括金属; 所述不可打印区域包括在所述基板的顶表面上方升高的金属第二不透明区域,所述第二不透明区域具有侧壁和相对的顶部和底部表面,所述第二不透明区域包括所述金属; 以及在第一和第二不透明区域的顶表面和侧壁上的共形保护性金属氧化物覆盖层。 保形层通过氧化形成。

    Image sensor, method and design structure including non-planar reflector
    5.
    发明授权
    Image sensor, method and design structure including non-planar reflector 失效
    图像传感器,方法和设计结构包括非平面反射器

    公开(公告)号:US08647913B2

    公开(公告)日:2014-02-11

    申请号:US13614210

    申请日:2012-09-13

    IPC分类号: H01L27/00

    摘要: A solid state image sensor, a method for fabricating the solid state image sensor and a design structure for fabricating the solid state image sensor structure include a substrate that in turn includes a photosensitive region. Also included within solid state image sensor is a non-planar reflector layer located over a side of the photosensitive region and the substrate opposite an incoming radiation side of the photosensitive region and the substrate. The non-planar reflector layer is shaped and positioned to reflect uncaptured incident radiation back into the photosensitive region while avoiding optical cross-talk with an additional photosensitive region laterally separated within the substrate.

    摘要翻译: 固态图像传感器,制造固态图像传感器的方法和用于制造固态图像传感器结构的设计结构包括依次包括感光区域的基板。 还包括在固态图像传感器内的非平面反射器层位于感光区域和基板的与感光区域和基板的入射辐射侧相对的一侧上。 非平面反射器层被成形和定位成将未捕获的入射辐射反射回光敏区域,同时避免与衬底内横向分离的附加光敏区域的光学串扰。

    Semiconductor transistors having high-K gate dielectric layers and metal gate electrodes
    6.
    发明授权
    Semiconductor transistors having high-K gate dielectric layers and metal gate electrodes 失效
    具有高K栅极电介质层和金属栅电极的半导体晶体管

    公开(公告)号:US07790559B2

    公开(公告)日:2010-09-07

    申请号:US12038195

    申请日:2008-02-27

    IPC分类号: H01L21/336

    摘要: A semiconductor structure and a method for forming the same. The semiconductor structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a final gate dielectric region, (iv) a final gate electrode region, and (v) a first gate dielectric corner region. The final gate dielectric region (i) includes a first dielectric material, and (ii) is disposed between and in direct physical contact with the channel region and the final gate electrode region. The first gate dielectric corner region (i) includes a second dielectric material that is different from the first dielectric material, (ii) is disposed between and in direct physical contact with the first source/drain region and the final gate dielectric region, (iii) is not in direct physical contact with the final gate electrode region, and (iv) overlaps the final gate electrode region in a reference direction.

    摘要翻译: 半导体结构及其形成方法。 半导体结构包括(i)半导体衬底,其包括沟道区,(ii)半导体衬底上的第一和第二源极/漏极区,(iii)最终栅极电介质区,(iv)最终栅电极区和 (v)第一栅介质角区域。 最后的栅介质区域(i)包括第一电介质材料,和(ii)设置在沟道区域和最终栅电极区域之间并与其直接物理接触。 第一栅介质角区域(i)包括与第一介电材料不同的第二电介质材料,(ii)设置在第一源极/漏极区域和最终栅极电介质区域之间并与之直接物理接触;(iii) )不与最终栅电极区域直接物理接触,并且(iv)在参考方向上与最终栅电极区域重叠。

    Semiconductor transistors having high-K gate dielectric layers and metal gate electrodes
    7.
    发明授权
    Semiconductor transistors having high-K gate dielectric layers and metal gate electrodes 有权
    具有高K栅极电介质层和金属栅电极的半导体晶体管

    公开(公告)号:US08227874B2

    公开(公告)日:2012-07-24

    申请号:US12861913

    申请日:2010-08-24

    IPC分类号: H01L29/78

    摘要: A semiconductor structure. The semiconductor structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a final gate dielectric region, (iv) a final gate electrode region, and (v) a first gate dielectric corner region. The final gate dielectric region (i) includes a first dielectric material, and (ii) is disposed between and in direct physical contact with the channel region and the final gate electrode region. The first gate dielectric corner region (i) includes a second dielectric material that is different from the first dielectric material, (ii) is disposed between and in direct physical contact with the first source/drain region and the final gate dielectric region, (iii) is not in direct physical contact with the final gate electrode region, and (iv) overlaps the final gate electrode region in a reference direction.

    摘要翻译: 半导体结构。 半导体结构包括(i)半导体衬底,其包括沟道区,(ii)半导体衬底上的第一和第二源极/漏极区,(iii)最终栅极电介质区,(iv)最终栅电极区和 (v)第一栅介质角区域。 最后的栅介质区域(i)包括第一电介质材料,和(ii)设置在沟道区域和最终栅电极区域之间并与其直接物理接触。 第一栅介质角区域(i)包括与第一介电材料不同的第二电介质材料,(ii)设置在第一源极/漏极区域和最终栅极电介质区域之间并与之直接物理接触;(iii) )不与最终栅电极区域直接物理接触,并且(iv)在参考方向上与最终栅电极区域重叠。

    SEMICONDUCTOR TRANSISTORS HAVING HIGH-K GATE DIELECTRIC LAYERS AND METAL GATE ELECTRODES
    8.
    发明申请
    SEMICONDUCTOR TRANSISTORS HAVING HIGH-K GATE DIELECTRIC LAYERS AND METAL GATE ELECTRODES 失效
    具有高K栅电介质层和金属栅极电极的半导体晶体管

    公开(公告)号:US20090212376A1

    公开(公告)日:2009-08-27

    申请号:US12038195

    申请日:2008-02-27

    IPC分类号: H01L21/336 H01L29/78

    摘要: A semiconductor structure and a method for forming the same. The semiconductor structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a final gate dielectric region, (iv) a final gate electrode region, and (v) a first gate dielectric corner region. The final gate dielectric region (i) includes a first dielectric material, and (ii) is disposed between and in direct physical contact with the channel region and the final gate electrode region. The first gate dielectric corner region (i) includes a second dielectric material that is different from the first dielectric material, (ii) is disposed between and in direct physical contact with the first source/drain region and the final gate dielectric region, (iii) is not in direct physical contact with the final gate electrode region, and (iv) overlaps the final gate electrode region in a reference direction.

    摘要翻译: 半导体结构及其形成方法。 半导体结构包括(i)半导体衬底,其包括沟道区,(ii)半导体衬底上的第一和第二源极/漏极区,(iii)最终栅极电介质区,(iv)最终栅电极区和 (v)第一栅介质角区域。 最后的栅介质区域(i)包括第一电介质材料,和(ii)设置在沟道区域和最终栅电极区域之间并与其直接物理接触。 第一栅介质角区域(i)包括与第一介电材料不同的第二电介质材料,(ii)设置在第一源极/漏极区域和最终栅极电介质区域之间并与之直接物理接触;(iii) )不与最终栅电极区域直接物理接触,并且(iv)在参考方向上与最终栅电极区域重叠。

    CMOS sensors having charge pushing regions
    9.
    发明授权
    CMOS sensors having charge pushing regions 失效
    CMOS传感器具有电荷推送区域

    公开(公告)号:US07492048B2

    公开(公告)日:2009-02-17

    申请号:US11275497

    申请日:2006-01-10

    IPC分类号: H01L31/062

    摘要: Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.

    摘要翻译: 结构及其形成方法。 该半导体结构包括包含第一半导体区域和第二半导体区域的光电二极管。 第一和第二半导体区域分别掺杂有第一和第二掺杂极性,并且第一和第二掺杂极性相反。 半导体结构还包括传输门,其包括(i)第一延伸区,(ii)第二延伸区和(iii)浮动扩散区。 第一和第二延伸区分别与光电二极管和浮动扩散区直接物理接触。 半导体结构还包括电荷推送区域。 电荷推送区域与第一半导体区域重叠,并且不与浮动扩散区域重叠。 电荷推送区域包括透明且导电的材料。

    Variable focus point lens
    10.
    发明授权
    Variable focus point lens 有权
    可变焦点镜头

    公开(公告)号:US08238032B2

    公开(公告)日:2012-08-07

    申请号:US12708561

    申请日:2010-02-19

    IPC分类号: G02B3/12

    CPC分类号: G02B3/14

    摘要: A variable focal point lens includes a transparent tank, which comprises a transparent enclosure containing a transparent flexible membrane separating the inner volume of the transparent tank into an upper tank portion and a lower tank portion. The upper tank portion and the lower tank portion contain liquids having different indices of refraction. The transparent flexible membrane is electrostatically displaced to change the thicknesses of the first tank portion and the second tank portion in the path of the light, thereby shifting the focal point of the lens axially and/or laterally. The electrostatic displacement of the membrane may be effected by a fixed charge in the membrane and an array of enclosure-side conductive structures on the transparent enclosure, or an array of membrane-side conductive structures on the transparent membrane and an array of enclosure-side conductive structures.

    摘要翻译: 可变焦点透镜包括透明容器,透明容器包括透明的外壳,该透明外壳包含将透明容器的内部容积分隔成上部容器部分和下部容器部分的透明柔性膜。 上罐部分和下罐部分含有不同折射率的液体。 透明柔性膜被静电移位以改变光路中的第一罐部分和第二罐部分的厚度,从而轴向和/或横向地移动透镜的焦点。 膜的静电位移可以通过膜中的固定电荷和透明外壳上的封闭侧导电结构阵列,或透明膜上的膜侧导电结构阵列和外壳侧阵列 导电结构。