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公开(公告)号：US20060142055A1
公开(公告)日：2006-06-29
申请号：US11114432
申请日：2005-04-26
申请人： Shi-Yun Cho , Young-Min Lee , Jea-Hyuck Lee , Shin-Hee Cho , Kyung-Wan Park
发明人： Shi-Yun Cho , Young-Min Lee , Jea-Hyuck Lee , Shin-Hee Cho , Kyung-Wan Park
CPC分类号： H01L25/162 , H01L23/50 , H01L23/66 , H01L2924/0002 , H01L2924/15192 , H01L2924/15311 , H01L2924/19105 , H05K1/0231 , H05K1/0237 , H05K1/0262 , H05K1/141 , H05K1/147 , H05K2201/10689 , H01L2924/00
摘要： A printed circuit board structure for a mobile terminal including a main printed circuit board including elements required for functions of the mobile terminal and mounted on an upper surface of the main printed circuit board, and an auxiliary printed circuit board laminated on the main printed circuit board including at least one element further required for the functions of the mobile terminal and mounted on an upper surface of the auxiliary printed circuit board.
摘要翻译： 一种用于移动终端的印刷电路板结构，包括主印刷电路板，其包括移动终端的功能所需的元件，并且安装在主印刷电路板的上表面上，以及叠层在主印刷电路板上的辅助印刷电路板 包括移动终端的功能进一步需要并安装在辅助印刷电路板的上表面上的至少一个元件。
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公开(公告)号：US07301751B2
公开(公告)日：2007-11-27
申请号：US11229756
申请日：2005-09-19
申请人： Jea-Hyuck Lee , Young-Min Lee , Shi-Yun Cho , Shin-Hee Cho , Kyung-Wan Park
发明人： Jea-Hyuck Lee , Young-Min Lee , Shi-Yun Cho , Shin-Hee Cho , Kyung-Wan Park
CPC分类号： H01G4/228 , H01G4/30 , H05K1/162 , H05K3/4641 , H05K2201/0355 , H05K2201/09336 , H05K2201/09763
摘要： An embedded capacitor comprises a first substrate on which a plurality of electrically insulated electrode patterns and a ground pattern are formed, a second substrate separated from the first substrate, a plurality of dielectric layers stacked between the first and second substrates, a plurality of metal layers inserted between the dielectric layers and connected to the electrode patterns of the first substrate, and a plurality of ground layers inserted between the dielectric layers alternately with the metal layers.
摘要翻译： 嵌入式电容器包括：第一基板，其上形成有多个电绝缘电极图案和接地图案;与第一基板分离的第二基板，堆叠在第一和第二基板之间的多个电介质层，多个金属层 插入在电介质层之间并连接到第一衬底的电极图案，以及多个接地层与金属层交替地插入在电介质层之间。
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公开(公告)号：US20060098386A1
公开(公告)日：2006-05-11
申请号：US11229756
申请日：2005-09-19
申请人： Jea-Hyuck Lee , Young-Min Lee , Shi-Yun Cho , Shin-Hee Cho , Kyung-Wan Park
发明人： Jea-Hyuck Lee , Young-Min Lee , Shi-Yun Cho , Shin-Hee Cho , Kyung-Wan Park
IPC分类号： H01G4/30
CPC分类号： H01G4/228 , H01G4/30 , H05K1/162 , H05K3/4641 , H05K2201/0355 , H05K2201/09336 , H05K2201/09763
摘要： An embedded capacitor comprises a first substrate on which a plurality of electrically insulated electrode patterns and a ground pattern are formed, a second substrate separated from the first substrate, a plurality of dielectric layers stacked between the first and second substrates, a plurality of metal layers inserted between the dielectric layers and connected to the electrode patterns of the first substrate, and a plurality of ground layers inserted between the dielectric layers alternately with the metal layers.
摘要翻译： 嵌入式电容器包括：第一基板，其上形成有多个电绝缘电极图案和接地图案;与第一基板分离的第二基板，堆叠在第一和第二基板之间的多个电介质层，多个金属层 插入在电介质层之间并连接到第一衬底的电极图案，以及多个接地层与金属层交替地插入在电介质层之间。
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公开(公告)号：US20110228490A1
公开(公告)日：2011-09-22
申请号：US13050378
申请日：2011-03-17
申请人： Yu-Su KIM , Kyu-Sub Kwak , Young-Min LEE , Shi-Yun Cho , Jea-Hyuck Lee , Se-Ho Park , Youn-Ho Choi , Seung-Woo Han , Ji-Hyun Jung
发明人： Yu-Su KIM , Kyu-Sub Kwak , Young-Min LEE , Shi-Yun Cho , Jea-Hyuck Lee , Se-Ho Park , Youn-Ho Choi , Seung-Woo Han , Ji-Hyun Jung
IPC分类号： H05K1/18
CPC分类号： H05K3/323 , H05K1/189 , H05K2201/10159
摘要： A large capacity memory module mounting device employed in a portable terminal is provided, including a large capacity memory module including a plurality of first contact pads; and a flexible circuit board including a plurality of second contact pads and electrically connected to the large capacity memory module by forming solder pads in a heating process after the first and second contact pads are positioned in a face-to-face manner. Accordingly, the large capacity memory module can be advantageously mounted to the portable terminal and an electromagnetic field can be effectively shielded.
摘要翻译： 提供了一种在便携式终端中使用的大容量存储模块安装装置，包括：大容量存储模块，包括多个第一接触焊盘; 以及柔性电路板，包括多个第二接触焊盘，并且在第一和第二接触焊盘以面对面的方式定位之后，通过在加热过程中形成焊盘而电连接到大容量存储器模块。 因此，大容量存储器模块可以有利地安装到便携式终端，并且可以有效地屏蔽电磁场。
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公开(公告)号：US20110157858A1
公开(公告)日：2011-06-30
申请号：US12974673
申请日：2010-12-21
申请人： Ji-Hyun Jung , Byung-Jik Kim , Shi-Yun Cho , Ho-Seong Seo , Kyung-Wan Park , Yeun-Ho Choi , Yu-Su Kim , Seok-Myong Kang
发明人： Ji-Hyun Jung , Byung-Jik Kim , Shi-Yun Cho , Ho-Seong Seo , Kyung-Wan Park , Yeun-Ho Choi , Yu-Su Kim , Seok-Myong Kang
IPC分类号： H05K1/14
CPC分类号： H01L25/0657 , H01L23/3128 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2225/0651 , H01L2225/06513 , H01L2225/06527 , H01L2924/00014 , H01L2924/01322 , H01L2924/181 , H01L2924/19107 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided is a System-In-Package (SIP) having embedded circuit boards in which boards are electrically connected and a plurality of chips are embedded in a board in a stacked manner. The SIP includes a first board on a surface of which a first circuit is formed, a second board which is provided on a top surface of the first board in a stacked manner and includes a plurality of chips embedded therein in a stacked manner, and a third board which is provided on a top surface of the second board in a stacked manner and on a surface of which a second circuit is formed.
摘要翻译： 提供了一种具有嵌入式电路板的系统级封装（SIP），其中板电连接，并且多个芯片以堆叠的方式嵌入在板中。 SIP包括在其表面上形成第一电路的第一板，以堆叠方式设置在第一板的顶表面上并且包括以堆叠方式嵌入其中的多个芯片的第二板，以及 第三板，其以层叠的方式设置在第二板的顶表面上，并且在其表面上形成第二电路。
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公开(公告)号：US08552302B2
公开(公告)日：2013-10-08
申请号：US12974763
申请日：2010-12-21
申请人： Kyung-Wan Park , Shi-Yun Cho , Byung-Jik Kim , Ho-Seong Seo , Youn-Ho Choi , Yu-Su Kim , Seok-Myong Kang , Ji-Hyun Jung
发明人： Kyung-Wan Park , Shi-Yun Cho , Byung-Jik Kim , Ho-Seong Seo , Youn-Ho Choi , Yu-Su Kim , Seok-Myong Kang , Ji-Hyun Jung
IPC分类号： H05K1/03
摘要： An embedded circuit board is disclosed including a first copper clad laminate formed with a plurality of cavities and including a plurality of chips having different thicknesses embedded in the cavities, a second copper clad laminate provided in the cavities to allow the first copper clad laminate to level with the chips; and a resin coated copper foil provided on upper surfaces of the first and second copper clad laminates.
摘要翻译： 公开了一种嵌入式电路板，其包括形成有多个空腔的第一覆铜层压板，并且包括嵌入空腔中的具有不同厚度的多个芯片，设置在该空腔中的第二覆铜层压板，以使第一覆铜层压板达到 与芯片; 以及设置在第一和第二覆铜层压板的上表面上的树脂涂覆铜箔。
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公开(公告)号：US20080192449A1
公开(公告)日：2008-08-14
申请号：US12028864
申请日：2008-02-11
申请人： Dong-Churl Kim , Shi-Yun Cho , Hong-Kweun Kim , Kyu-Sub Kwak , Kyung-Wan Park , Seung-Woo Han
发明人： Dong-Churl Kim , Shi-Yun Cho , Hong-Kweun Kim , Kyu-Sub Kwak , Kyung-Wan Park , Seung-Woo Han
IPC分类号： H05K7/00
CPC分类号： H05K9/0022 , H01L23/3121 , H01L23/49811 , H01L23/50 , H01L2224/16225 , H01L2224/48227 , H01L2924/00011 , H01L2924/00014 , H01L2924/3025 , H05K1/0218 , H05K3/284 , H05K2201/10318 , H05K2203/1316 , H01L2224/0401
摘要： An electric circuit package includes: a printed circuit substrate having an insulating layer and conductive pattern layers formed on an upper surface of the insulating layer; at least one of electronic parts disposed on an upper surface of the printed circuit substrate; at least one of conductive pins electrically connected to an conductive pattern layer providing grounding among the conductive pattern layers; and a molding member formed on the insulating layer in such a manner that the conductive pins and the electric parts are buried in the molding member, wherein each conductive pin has an upper surface exposed to an upper part of the molding member.
摘要翻译： 电路封装包括：印刷电路基板，其具有绝缘层和形成在所述绝缘层的上表面上的导电图案层; 设置在印刷电路基板的上表面上的电子部件中的至少一个; 至少一个导电引脚与导电图案层电连接，在导电图案层之间提供接地; 以及模制构件，其形成在所述绝缘层上，使得所述导电销和所述电气部件被埋在所述模制构件中，其中每个导电销具有暴露于所述模制构件的上部的上表面。
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公开(公告)号：US20110155426A1
公开(公告)日：2011-06-30
申请号：US12974763
申请日：2010-12-21
申请人： Kyung-Wan PARK , Shi-Yun Cho , Byung-Jik Kim , Ho-Seong Seo , Youn-Ho Chol , Yu-Su Kim , Seok-Myong Kang , Ji-Hyun Jung
发明人： Kyung-Wan PARK , Shi-Yun Cho , Byung-Jik Kim , Ho-Seong Seo , Youn-Ho Chol , Yu-Su Kim , Seok-Myong Kang , Ji-Hyun Jung
摘要： An embedded circuit board is disclosed including a first copper clad laminate formed with a plurality of cavities and including a plurality of chips having different thicknesses embedded in the cavities, a second copper clad laminate provided in the cavities to allow the first copper clad laminate to level with the chips; and a resin coated copper foil provided on upper surfaces of the first and second copper clad laminates.
摘要翻译： 公开了一种嵌入式电路板，其包括形成有多个空腔的第一覆铜层压板，并且包括嵌入空腔中的具有不同厚度的多个芯片，设置在该空腔中的第二覆铜层压板，以使第一覆铜层压板达到 与芯片; 以及设置在第一和第二覆铜层压板的上表面上的树脂涂覆铜箔。
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公开(公告)号：US20050006654A1
公开(公告)日：2005-01-13
申请号：US10716653
申请日：2003-11-19
申请人： Byung-Kwon Kang , Shi-Yun Cho , In Kim , Do-Young Rhee , Tae-Il Kim , Dong-Hoon Jang , Seung-Won Lee , Duk-Ho Jeon , June-Hyeon Ahn , Young-Min Lee , Jong-Ryeol Kim
发明人： Byung-Kwon Kang , Shi-Yun Cho , In Kim , Do-Young Rhee , Tae-Il Kim , Dong-Hoon Jang , Seung-Won Lee , Duk-Ho Jeon , June-Hyeon Ahn , Young-Min Lee , Jong-Ryeol Kim
CPC分类号： H01S5/026 , H01S5/0265
摘要： A semiconductor monolithic integrated optical transmitter including a plurality of active layers formed on a semiconductor substrate is disclosed, which comprises: a distributed feedback laser diode including a grating for reflecting light with a predetermined wavelength and a first active layer for oscillating received light from the grating; an electro-absorption modulator including a second active layer for receiving light from the first active layer, wherein the received light intensity is modulated through a change of absorbency in accordance with an applied voltage; an optical amplifier including a third active layer for amplifying received light from the second active layer; a first optical attenuator between the first active layer and the second active layer; and a second optical attenuator between the second active layer and the third active layer.
摘要翻译： 公开了一种包括形成在半导体衬底上的多个有源层的半导体单片集成光发射器，其包括：分布反馈激光二极管，包括用于反射具有预定波长的光的光栅和用于振荡来自光栅的接收光的第一有源层 ; 一种电吸收调制器，包括用于接收来自第一有源层的光的第二有源层，其中根据施加的电压通过吸收变化改变接收的光强度; 光放大器，包括用于放大来自第二有源层的接收光的第三有源层; 第一有源层和第二有源层之间的第一光衰减器; 以及在第二有源层和第三有源层之间的第二光衰减器。
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10.发明申请PRINTED CIRCUIT BOARD HAVING BUILT-IN INTEGRATED CIRCUIT PACKAGE AND FABRICATION METHOD THEREFOR 有权具有内置集成电路封装的印刷电路板及其制造方法公开(公告)号：US20100140782A1
公开(公告)日：2010-06-10
申请号：US12633433
申请日：2009-12-08
申请人： Sang-Hyun Kim , Shi-Yun Cho , Young-Min Lee , Kyu-sub Kwak , Youn-Ho Choi
发明人： Sang-Hyun Kim , Shi-Yun Cho , Young-Min Lee , Kyu-sub Kwak , Youn-Ho Choi
CPC分类号： H05K1/188 , H01L23/5383 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H05K3/4602 , H05K3/4652 , H05K2201/0355 , H05K2201/10674 , H05K2203/0554
摘要： A Printed Circuit Board (PCB) is provided in which at least one built-in Integrated Circuit (IC) package has a plurality of conductive bumps on an IC. The plurality of conductive bumps are for external electrical connection. The IC package is accommodated within a core layer of a multi-layer PCB by a connection member on the IC. The connection member is formed between the conductive bumps and the core layer with contact holes in contact with the conductive bumps. The conductive bumps are electrically connected through conductor layers formed in the contact holes.
摘要翻译： 提供了印刷电路板（PCB），其中至少一个内置集成电路（IC）封装在IC上具有多个导电凸块。 多个导电凸块用于外部电连接。 IC封装通过IC上的连接构件容纳在多层PCB的芯层内。 连接构件形成在导电凸块和芯层之间，其中接触孔与导电凸块接触。 导电凸块通过形成在接触孔中的导体层电连接。
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