摘要:
A system, apparatus and method for controlled impedance at transitional via sites using barrel inductance minimization are provided. In one embodiment, one or more sidewalls of a via barrel are preferably processed such that conductive material disposed thereon is selectively removed thereby forming an inner-via trace connecting one or more conductive traces and/or pads on a first substrate layer to one or more conductive traces and/or pads on a second substrate layer. Removal of conductive material from a sidewall of the via barrel is done in a manner such that an inner-via trace traveling from a first surface to a second surface of one or more substrate layers possesses at least one electrical characteristic substantially approximating a corresponding electrical characteristic of those structures to which the inner-via trace is connected.
摘要:
A system, apparatus and method for controlled impedance at transitional via sites using barrel inductance minimization are provided. In one embodiment, one or more sidewalls of a via barrel are preferably processed such that conductive material disposed thereon is selectively removed thereby forming an inner-via trace connecting one or more conductive traces and/or pads on a first substrate layer to one or more conductive traces and/or pads on a second substrate layer. Removal of conductive material from a sidewall of the via barrel is done in a manner such that an inner-via trace traveling from a first surface to a second surface of one or more substrate layers possesses at least one electrical characteristic substantially approximating a corresponding electrical characteristic of those structures to which the inner-via trace is connected.
摘要:
A methodology may be used that takes into account the inductive coupling of current transients on the power rails of a printed circuit board (PCB) that may be coupled to the barrel of a via. By taking into account the coupling of the current transients on the power rails of the PCB, more accurate and realistic modeling results may be obtained. Inductive coupling of the current transients from the power rails may be more pronounced at higher frequencies and may be additive for more layer transitions (e.g., more via transitions) of the PCB.
摘要:
An apparatus, method and system are provided for quantifying communication channel intersymbol interference jitter effect contribution to timing skew. In general, lossy and lossless characteristics of the communication channel are preferably obtained and an output signal of the communication channel is sampled. From the sampled output signal and the lossy characteristics of the communication channel, an input signal may be derived. Using the lossless characteristics of the communication channel, the derived input signal and the sampled output signal, a value indicating the contribution of intersymbol interference jitter effect on timing skew budget for a selection communication channel may be obtained.
摘要:
An integrated circuit (IC) device (200) includes an electronic substrate (201) having a plurality of layers (120) including at least one first electrically conductive layer and a lower surface dielectric layer. The IC device also includes an electrically conductive surface layer (126) disposed on the dielectric layer and coupled to a ground terminal (210) for the electronic substrate (201) for blocking electromagnetic interference (EMI). In the IC device, the conductive surface layer (126) includes an EMI shield region (204) over at least a portion of the dielectric layer. The EMI shield region (204) includes at least one solid area (206) and one or more adhesion areas (207) having a plurality of openings (208) arranged aperiodically in the adhesion areas (207).
摘要:
A digital signal waveform receiving circuit may be processed by a non-linear adaptive canonical correlation analysis circuit that may quantify and minimize crosstalk-induced jitter timing skew for improving set-up and hold timing margins of data streams on the receiving circuit. A non-linear adaptive canonical correlation analysis circuit may be placed between an incoming digital signal from a serial link and a PHY receiving layer of an information handling system 100. The PHY receiving layer of the information handling system may be coupled to the non-linear adaptive canonical correlation analysis circuit or may be coupled to the digital signal. This coupling selection may be automatically programmed depending on received signal cross-talk-induced jitter timing skew or may be programmed by a user of the information handling system.
摘要:
Packaged integrated circuits having surface mount devices and methods to form the same are disclosed. A disclosed method comprises attaching an integrated circuit to a first side of a substrate, forming one or more first conductive elements on the substrate, attaching a surface mount device to a second side of the substrate via the first conductive elements, forming one or more second conductive elements on the second side of the substrate.
摘要:
An apparatus, method and system are provided for quantifying communication channel intersymbol interference jitter effect contribution to timing skew. In general, lossy and lossless characteristics of the communication channel are preferably obtained and an output signal of the communication channel is sampled. From the sampled output signal and the lossy characteristics of the communication channel, an input signal may be derived. Using the lossless characteristics of the communication channel, the derived input signal and the sampled output signal, a value indicating the contribution of intersymbol interference jitter effect on timing skew budget for a selection communication channel may be obtained.
摘要:
An apparatus, method and system are provided for quantifying communication channel intersymbol interference jitter effect contribution to timing skew. In general, lossy and lossless characteristics of the communication channel are preferably obtained and an output signal of the communication channel is sampled. From the sampled output signal and the lossy characteristics of the communication channel, an input signal may be derived. Using the lossless characteristics of the communication channel, the derived input signal and the sampled output signal, a value indicating the contribution of intersymbol interference jitter effect on timing skew budget for a selection communication channel may be obtained.
摘要:
A wavelet transform noise minimization circuit comprises a differential receiver, a voltage comparator, a wavelet transform circuit, an electrical idle (EI) detector circuit, a phase interpolator, a phase-locked-loop (PLL), and a reference clock buffer. The wavelet transform noise minimization circuit may be beneficially applied wherever there is non-deterministic (e.g., random) noise in the PHY layer during an electrical idle state. The wavelet transform noise minimization circuit may be used to improve noise margin during an electrical idle state, and/or reduce the occurrence of false activation of a PHY layer when in the electrical idle state.