INTERLAYER CONNECTOR FOR PREVENTING DELAMINATION OF SEMICONDUCTOR DEVICE AND METHODS OF FORMING SAME
    3.
    发明申请
    INTERLAYER CONNECTOR FOR PREVENTING DELAMINATION OF SEMICONDUCTOR DEVICE AND METHODS OF FORMING SAME 有权
    用于防止半导体器件分层的层间连接器及其形成方法

    公开(公告)号:US20050280152A1

    公开(公告)日:2005-12-22

    申请号:US10710147

    申请日:2004-06-22

    摘要: An interlayer connector for preventing delamination of semiconductor layers, and methods of forming the connector are disclosed. The connector includes a first connector head in a first distal layer, a second connector head in a second distal layer and a connector body coupling the first and second connector heads. Each connector head has a dimension greater is size than the connector body such that the layers are securely held together. The interlayer connector may be isolated from current-carrying wiring or provided in the form of a contact via. The interlayer connector provides a mechanical mechanism to prevent layers from delaminating regardless of the materials used. The invention also eliminates the need for white space fill above and below via fill by using the connectors coplanar with the on device wiring.

    摘要翻译: 公开了一种用于防止半导体层分层的层间连接器,以及形成连接器的方法。 连接器包括第一远端层中的第一连接器头部,第二远侧层中的第二连接器头部和联接第一和第二连接器头部的连接器主体。 每个连接器头的尺寸大于连接器主体的尺寸,使得这些层牢固地保持在一起。 层间连接器可以与载流布线隔离或以接触通孔的形式提供。 层间连接器提供机械机构,以防止层分层,而不管使用的材料如何。 本发明还通过使用与开启器件布线共面的连接器,消除了通过填充物上下空白填充的需要。

    Copper Alloy Via Bottom Liner
    4.
    发明申请
    Copper Alloy Via Bottom Liner 审中-公开
    铜合金通底板

    公开(公告)号:US20080020230A1

    公开(公告)日:2008-01-24

    申请号:US11865215

    申请日:2007-10-01

    IPC分类号: B32B15/00 B05D1/36

    摘要: Improved mechanical and adhesive strength and resistance to breakage of copper integrated circuit interconnections is obtained by forming a copper alloy in a copper via/wiring connection in an integrated circuit while minimizing adverse electrical effects of the alloy by confining the alloy to an interfacial region of said via/wiring connection and not elsewhere by a barrier which reduces or substantially eliminates the thickness of alloy in the conduction path. The alloy location and composition are further stabilized by reaction of all available alloying material with copper, copper alloys or other metals and their alloys.

    摘要翻译: 通过在集成电路中的铜通孔/布线连接中形成铜合金,同时通过将合金限制在所述合金的界面区域来最小化合金的不利电效应来获得铜集成电路互连的改进的机械和粘合强度和断裂性 通孔/布线连接,而不在其他地方,通过减小或基本消除导电路径中合金的厚度。 通过所有可用的合金材料与铜,铜合金或其他金属及其合金的反应,合金位置和组成进一步稳定。

    COPPER ALLOY VIA BOTTOM LINER
    7.
    发明申请
    COPPER ALLOY VIA BOTTOM LINER 有权
    铜合金通过底部衬里

    公开(公告)号:US20060027930A1

    公开(公告)日:2006-02-09

    申请号:US10710828

    申请日:2004-08-05

    IPC分类号: H01L23/48

    摘要: Improved mechanical and adhesive strength and resistance to breakage of copper integrated circuit interconnections is obtained by forming a copper alloy in a copper via/wiring connection in an integrated circuit while minimizing adverse electrical effects of the alloy by confining the alloy to an interfacial region of said via/wiring connection and not elsewhere by a barrier which reduces or substantially eliminates the thickness of alloy in the conduction path. The alloy location and composition are further stabilized by reaction of all available alloying material with copper, copper alloys or other metals and their alloys.

    摘要翻译: 通过在集成电路中的铜通孔/布线连接中形成铜合金,同时通过将合金限制在所述合金的界面区域来最小化合金的不利电效应来获得铜集成电路互连的改进的机械和粘合强度和断裂性 通孔/布线连接,而不在其他地方,通过减小或基本消除导电路径中合金的厚度。 通过所有可用的合金材料与铜,铜合金或其他金属及其合金的反应,合金位置和组成进一步稳定。