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9 条记录 (耗时 0.015 秒)

    Method for fabricating an image sensor mounted by mass reflow
    1.
    发明授权
    Method for fabricating an image sensor mounted by mass reflow 有权
    制造通过质量回流安装的图像传感器的方法

    公开(公告)号：US07491572B2

    公开(公告)日：2009-02-17

    申请号：US10574316

    申请日：2004-09-30

    申请人： Jong-Heon Kim ,  Chi-Jung Song

    发明人： Jong-Heon Kim ,  Chi-Jung Song

    IPC分类号： H01L21/00 ,  H01L31/0328

    CPC分类号： H01L27/14618 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14685 ,  H01L27/14687 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

    摘要： A package for semiconductor image pickup device is provided. The package is fabricated by using flip chip bumping. During deposition process of forming a metallic bonding layer and a metal layer for plating, a surface of a semiconductor image pickup device is maintained at the range between room temperature and 200° C. in accordance with a first embodiment. A polymer layer for preventing stress from generating can absorb stress generated during the deposition process in accordance with a second embodiment. According to the present invention, a functional polymer layer on the surface of a semiconductor image pickup device can be prevent from being deteriorated in its properties and from transforming at its surface.

    摘要翻译： 提供了一种用于半导体图像拾取装置的封装。 封装通过使用倒装芯片凸块来制造。 在形成金属接合层和用于电镀的金属层的沉积工艺期间，根据第一实施例，半导体图像拾取装置的表面保持在室温和200℃之间的范围内。 用于防止产生应力的聚合物层可以吸收根据第二实施方案的沉积工艺期间产生的应力。 根据本发明，可以防止半导体图像拾取装置的表面上的功能性聚合物层的性质劣化，并且防止其表面变形。

    Image sensor mounted by mass reflow
    2.
    发明申请
    Image sensor mounted by mass reflow 有权
    图像传感器通过质量回流安装

    公开(公告)号：US20070085180A1

    公开(公告)日：2007-04-19

    申请号：US10574316

    申请日：2004-09-30

    申请人： Jong-Heon Kim ,  Chi-Jung Song

    发明人： Jong-Heon Kim ,  Chi-Jung Song

    IPC分类号： H01L23/02 ,  H01L21/00

    CPC分类号： H01L27/14618 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14685 ,  H01L27/14687 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

    摘要： A package for semiconductor image pickup device is provided. The package is fabricated by using flip chip bumping. During deposition process of forming a metallic bonding layer and a metal layer for plating, a surface of a semiconductor image pickup device is maintained at the range between room temperature and 200° C. in accordance with a first embodiment. A polymer layer for preventing stress from generating can absorb stress generated during the deposition process in accordance with a second embodiment. According to the present invention, a functional polymer layer on the surface of a semiconductor image pickup device can be prevent from being deteriorated in its properties and from transforming at its surface.

    摘要翻译： 提供了一种用于半导体图像拾取装置的封装。 封装通过使用倒装芯片凸块来制造。 在形成金属接合层和用于电镀的金属层的沉积工艺期间，根据第一实施例，半导体图像拾取装置的表面保持在室温和200℃之间的范围内。 用于防止产生应力的聚合物层可以吸收根据第二实施方案的沉积工艺期间产生的应力。 根据本发明，可以防止半导体图像拾取装置的表面上的功能性聚合物层的性质劣化，并且防止其表面变形。

    Semiconductor substrate and land grid array semiconductor package using same
    5.
    发明授权
    Semiconductor substrate and land grid array semiconductor package using same 失效
    半导体衬底和焊盘阵列半导体封装使用相同

    公开(公告)号：US06441498B1

    公开(公告)日：2002-08-27

    申请号：US09095570

    申请日：1998-06-11

    申请人： Chi-Jung Song

    发明人： Chi-Jung Song

    IPC分类号： H01L2940

    CPC分类号： H01L23/49805 ,  H01L23/13 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A land grid array (LGA) type semiconductor chip package includes an insulation body having a plurality of first conductive interconnections embedded therein. A cavity is formed in an upper portion of the insulation body. A plurality of first conductive interconnection patterns is formed outside the cavity and on marginal upper surfaces of the insulation body, and a plurality of second conductive interconnection patterns is formed on marginal lower surfaces of the insulation body. A plurality of third conductive interconnection patterns electrically connects the first and second conductive interconnection patterns, and a plurality of conductive bond pads is formed on a bottom of the cavity. A semiconductor chip is attached on the respective bond pads by a first adhesive member and a heat discharge member is attached by a second adhesive member on an upper surface of the semiconductor chip. An epoxy molding compound fills the cavity. The semiconductor package of the preferred embodiment enhances heat discharge efficiency and improves solder joint reliability.

    摘要翻译： 阵列阵列（LGA）型半导体芯片封装包括绝缘体，其具有嵌入其中的多个第一导电互连。 在绝缘体的上部形成空腔。 多个第一导电互连图案形成在空腔外部和绝缘体的边缘上表面上，多个第二导电互连图案形成在绝缘体的边缘下表面上。 多个第三导电互连图形电连接第一和第二导电互连图案，并且在空腔的底部上形成多个导电接合焊盘。 半导体芯片通过第一粘合构件附接在各个接合焊盘上，并且散热构件通过第二粘合构件附接在半导体芯片的上表面上。 环氧树脂模塑料填充空腔。 优选实施例的半导体封装提高了散热效率并提高了焊点的可靠性。

    Semiconductor chip stack package
    9.
    发明授权
    Semiconductor chip stack package 失效
    半导体芯片堆栈封装

    公开(公告)号：US5910682A

    公开(公告)日：1999-06-08

    申请号：US876436

    申请日：1997-06-16

    申请人： Chi-Jung Song

    发明人： Chi-Jung Song

    IPC分类号： H01L23/12 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L23/02

    CPC分类号： H01L25/0657 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2225/06586

    摘要： A semiconductor chip stack package includes a plurality of semiconductor chips, each having a plurality of chip pads formed on an upper surface and a plurality of wires respectively coupling a corresponding one of the plurality of chip pads to an edge portion of the semiconductor chip. A package body is formed by stacking the plurality of semiconductor chips one over another using a first adhesive medium. A tab tape attaches to a second side surface of the package body using a third adhesive medium. A heat sink attaches to each of a lower, upper and first side surfaces of the package body using a second adhesive medium. Then, a plurality of solder balls is formed on a lower surface of the tab tape for coupling to an external medium, such as a printed circuit board. The stack package facilitates external emission of the heat generated by the semiconductor chips to prevent the stack package reliability from deterioration.

    摘要翻译： 半导体芯片堆叠封装包括多个半导体芯片，每个半导体芯片具有形成在上表面上的多个芯片焊盘和分别将多个芯片焊盘中的相应一个芯片焊盘耦合到半导体芯片的边缘部分的多个引线。 通过使用第一粘合剂介质将多个半导体芯片一个接一个地堆叠而形成封装体。 标签带使用第三粘合剂介质附接到包装主体的第二侧表面。 散热器使用第二粘合剂介质附接到包装体的下部，上部和第一侧表面中的每一个。 然后，在接片带的下表面上形成多个焊球，以便耦合到诸如印刷电路板的外部介质。 堆叠封装有助于外部发射由半导体芯片产生的热量，以防止堆叠封装的可靠性恶化。