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    REUSABLE AND EXTENSIBLE FRAMEWORK FOR MULTIMEDIA APPLICATION DEVELOPMENT
    2.
    发明申请
    REUSABLE AND EXTENSIBLE FRAMEWORK FOR MULTIMEDIA APPLICATION DEVELOPMENT 有权
    多媒体应用开发的可重用和可扩展的框架

    公开(公告)号：US20110142032A1

    公开(公告)日：2011-06-16

    申请号：US12635928

    申请日：2009-12-11

    申请人： John R. Hayden ,  Robert D. Kirnum ,  Joseph A. Fisher ,  Brian M. Nixon ,  Arun V. Eledath ,  Ranjan Singh

    发明人： John R. Hayden ,  Robert D. Kirnum ,  Joseph A. Fisher ,  Brian M. Nixon ,  Arun V. Eledath ,  Ranjan Singh

    IPC分类号： H04L12/66 ,  H04N7/26

    CPC分类号： H04L12/66 ,  H04N19/115 ,  H04N19/40

    摘要： Systems and methods of developing and/or implementing multimedia applications. The system provides an extensible framework including an application layer, a framework utility layer, and a core engine layer. The framework utility layer includes an application programming interface, a video codec sub-framework (XCF), a video packetization sub-framework (XPF), and a video/text overlay sub-framework (XOF). The core engine layer includes one or more core codec engines and one or more core rendering engines. The XCF, XPF, and XOF sub-frameworks are effectively decoupled from the multimedia applications executing on the application layer, and the core codec and rendering engines of the core engine layer, allowing the XCF, XPF, and XOF sub-frameworks and core codec/rendering engines to be independently extensible. The system also fosters enhanced reuse of existing multimedia applications across a plurality of multimedia systems.

    摘要翻译： 开发和/或实施多媒体应用的系统和方法。 该系统提供了可扩展框架，包括应用层，框架实用层和核心引擎层。 框架效用层包括应用编程接口，视频编解码子框架（XCF），视频分组化子框架（XPF）和视频/文本覆盖子框架（XOF）。 核心引擎层包括一个或多个核心编解码器引擎和一个或多个核心渲染引擎。 XCF，XPF和XOF子框架与应用层上执行的多媒体应用程序以及核心引擎层的核心编解码器和渲染引擎有效地分离，允许XCF，XPF和XOF子框架和核心编解码器 /渲染引擎可独立扩展。 该系统还促进了多个多媒体系统中现有多媒体应用的增强的再利用。

    Apparatus and method for efficient switching of CPU mode between regions of high instruction level parallism and low instruction level parallism in computer programs
    3.
    发明授权
    Apparatus and method for efficient switching of CPU mode between regions of high instruction level parallism and low instruction level parallism in computer programs 失效
    计算机程序中高指令级副词和低指令级副词之间的CPU模式有效切换的装置和方法

    公开(公告)号：US6026479A

    公开(公告)日：2000-02-15

    申请号：US64701

    申请日：1998-04-22

    申请人： Joseph A. Fisher ,  Paolo Faraboschi ,  Paul G. Emerson ,  Prasad A. Raje

    发明人： Joseph A. Fisher ,  Paolo Faraboschi ,  Paul G. Emerson ,  Prasad A. Raje

    IPC分类号： G06F9/30 ,  G06F9/318 ,  G06F9/38

    CPC分类号： G06F9/3891 ,  G06F9/30076 ,  G06F9/30116 ,  G06F9/30123 ,  G06F9/30189 ,  G06F9/3802 ,  G06F9/3885

    摘要： A CPU having a cluster VLIW architecture is shown which operates in both a high instruction level parallelism (ILP) mode and a low ILP mode. In high ILP mode, the CPU executes wide instruction words using all operational clusters of the CPU and all of a main instruction cache and main data cache of the CPU are accessible to a high ILP task. The CPU also includes a mini-instruction cache, a mini-instruction register and a mini-data cache which are inactive during high ILP mode. An instruction level controller in the CPU receives a low ILP signal, such as an interrupt or function call to a low ILP routine, and switches to low ILP mode. In low ILP mode, the main instruction cache and main data cache are deactivated to preserve their contents. At the same time, a predetermined cluster remains active while the remaining clusters are also deactivated. The low ILP task executes instructions from the mini-instruction cache which are input to the predetermined cluster through the mini-instruction register. The mini-data cache stores operands for the low ILP task. The separate mini-instruction cache and mini-data cache along with the use of only the predetermined cluster minimizes the pollution of the main instruction and data caches, as well as pollution of register files in the deactivated clusters, with regard to a task executing in high ILP mode.

    摘要翻译： 示出了具有簇VLIW架构的CPU，其以高指令级并行（ILP）模式和低ILP模式操作。 在高ILP模式下，CPU使用CPU的所有操作群集执行宽指令字，并且高ILP任务可访问CPU的主指令高速缓存和主数据高速缓存。 CPU还包括微型指令高速缓存，微型指令寄存器和在高ILP模式期间不活动的微型数据高速缓存。 CPU中的指令级别控制器接收低ILP信号，例如对低ILP程序的中断或函数调用，并切换到低ILP模式。 在低ILP模式下，主指令高速缓存和主数据高速缓存被停用以保持其内容。 同时，预定的簇保持活动，而剩余的簇也被去激活。 低ILP任务执行通过迷你指令寄存器输入到预定簇的微指令高速缓存中的指令。 小数据高速缓存存储低ILP任务的操作数。 单独的迷你指令高速缓存和微型数据高速缓存以及仅使用预定的集群，最大限度地减少主指令和数据高速缓存的污染，以及对停用的集群中的寄存器文件的污染。 高ILP模式。

    Endotracheal tube introducer
    4.
    发明授权
    Endotracheal tube introducer 失效
    气管导管

    公开(公告)号：US5323771A

    公开(公告)日：1994-06-28

    申请号：US863112

    申请日：1992-04-03

    申请人： Joseph A. Fisher ,  Alan Berdowski

    发明人： Joseph A. Fisher ,  Alan Berdowski

    IPC分类号： A61M25/08 ,  A61M16/00 ,  A61M16/04

    CPC分类号： A61M16/0488

    摘要： An endotracheal tube introducer comprising a proximal end and a distal end, the proximal end comprising a mouth of greater diameter than an endotracheal tube being inserted into it and an elongated portion connected to, and extending longitudinally away from, the mouth for insertion thereof past the epiglottis, between the vocal cords, into the trachea, the elongated portion comprising at least one guide and reinforcing portion extending longitudinally along the length of the elongated portion away from the proximal end and mouth, and relatively thin pliable side portions or wings extending laterally from the sides of the guide portion, one from each side and overlap one another at least proximate the distal end.

    摘要翻译： 包括近端和远端的气管内导管器，所述近端包括比插入其中的气管插管更大的直径的口，以及连接到所述口并纵向远离所述口的细长部分，用于将其插入所述嘴 会话，在声带之间，进入气管，细长部分包括沿着细长部分的远离近端和嘴部的长度纵向延伸的至少一个引导件和加强部分，以及相对薄的柔软的侧部或翼部， 引导部分的侧面，每个侧面一个并且至少在远端附近彼此重叠。

    Mouthpiece
    5.
    发明授权
    Mouthpiece 失效
    喉舌

    公开(公告)号：US4895143A

    公开(公告)日：1990-01-23

    申请号：US135987

    申请日：1987-12-21

    申请人： Joseph A. Fisher

    发明人： Joseph A. Fisher

    IPC分类号： A62B9/06

    CPC分类号： A62B9/06

    摘要： A mouthpiece through which a person may breathe has a sealing flange for introduction into the mouth. The sealing flange has an upper portion for lying against the hard palate and a lower portion for fitting between the lower lip and the anterior surface about the lower teeth and gums. The juxtaposition in the mouth of the upper portion against the hard palate and the lower portion seated in the lower vestibule portion of the mouth results in the sealing flange forming an effective seal and the sealing flange being comfortably held in place in the mouth even when the mouth is open to the extent of the normal relaxed muscle tone of the mouth. To facilitate the seal when the mouthpiece is introduced into the mouth, a tooth tray is provided. Another aspect of the invention permits the mouthpiece to envelop the nostrils such that when the mouthpiece is in place all inspired and expired air must pass through the mouthpiece. In the best embodiment of the invention, the nostrils are enveloped by a naso-labial hood which envelops the entire nose forming a seal against the outline of the nose, thereby minimizing the non-respiratory tract dead air space inside the volume of the naso-labial hood.

    摘要翻译： 人可以呼吸的喉舌具有用于引入口中的密封凸缘。 密封凸缘具有用于覆盖硬腭的上部和用于在下部牙齿和牙龈周围配合下唇与前表面之间的下部。 在上部口部的并排位于口腔下部前庭部分中的硬腭和下部部分的并置导致密封凸缘形成有效的密封，并且密封凸缘舒适地保持在口中的适当位置，即使当 嘴巴开放到口腔正常松弛肌肉紧张度的程度。 为了在接口插入口中时便于密封，设置牙盘。 本发明的另一方面允许接口管包封鼻孔，使得当接口管就位时，所有启发和呼出的空气必须通过接口管。 在本发明的最佳实施例中，鼻孔被鼻 - 阴唇罩包围，鼻罩包围整个鼻子，形成与鼻子轮廓的密封，从而最小化鼻 - 鼻腔体内的非呼吸道死空气空间， 阴唇罩。

    Method and apparatus for storing and expanding variable-length program instructions upon detection of a miss condition within an instruction cache containing pointers to compressed instructions for wide instruction word processor architectures
    8.
    发明授权
    Method and apparatus for storing and expanding variable-length program instructions upon detection of a miss condition within an instruction cache containing pointers to compressed instructions for wide instruction word processor architectures 失效
    检测指令高速缓存中的未命中状态时存储和扩展可变长度程序指令的方法和装置，该指令包含指向宽指令字处理器架构的压缩指令的指针

    公开(公告)号：US5870576A

    公开(公告)日：1999-02-09

    申请号：US767450

    申请日：1996-12-16

    申请人： Paolo Faraboschi ,  Joseph A. Fisher

    发明人： Paolo Faraboschi ,  Joseph A. Fisher

    IPC分类号： G06F9/30 ,  G06F9/318 ,  G06F9/38 ,  G06F12/04 ,  G06F13/00

    CPC分类号： G06F9/3808 ,  G06F9/30152 ,  G06F9/30178 ,  G06F9/3816 ,  G06F9/3822 ,  G06F9/3885

    摘要： Methods apparatus for storing and expanding wide instruction words in a computer system are provided. The computer system includes a memory and an instruction cache. Compressed instruction words of a program are stored in a code heap segment of the memory, and code pointers are stored in a code pointer segment of the memory. Each of the code pointers contains a pointer to one of the compressed instruction words. Part of the program is stored in the instruction cache as expanded instruction words. During execution of the program, an instruction word is accessed in the instruction cache. When the instruction word required for execution is not present in the instruction cache, thereby indicating a cache miss, a code pointer corresponding to the required instruction word is accessed in the code pointer segment of memory. The code pointer is used to access a compressed instruction word corresponding to the required instruction word in the code heap segment of memory. The compressed instruction word is expanded to provide an expanded instruction word, which is loaded into the instruction cache and is accessed for execution.

    摘要翻译： 提供了用于在计算机系统中存储和扩展宽指令字的方法装置。 计算机系统包括存储器和指令高速缓存。 程序的压缩指令字存储在存储器的代码堆段中，代码指针存储在存储器的代码指针段中。 每个代码指针包含指向一个压缩指令字的指针。 程序的一部分作为扩展指令字存储在指令缓存中。 在程序执行期间，指令缓存中存取指令字。 当指令高速缓存中不存在执行所需的指令字，从而指示高速缓存未命中时，在存储器的代码指针段中访问与所需指令字对应的代码指针。 代码指针用于访问与存储器的代码堆段中所需指令字相对应的压缩指令字。 压缩指令字被扩展以提供扩展指令字，其被加载到指令高速缓存中并被访问以执行。

    Method and apparatus for enabling a computer system to adjust for latency assumptions
    9.
    发明授权
    Method and apparatus for enabling a computer system to adjust for latency assumptions 失效
    使计算机系统能够调整等待时间假设的方法和装置

    公开(公告)号：US5710912A

    公开(公告)日：1998-01-20

    申请号：US059041

    申请日：1993-05-06

    申请人： Michael S. Schlansker ,  B. Ramakrishna Rau ,  Rajiv Gupta ,  Joseph A. Fisher

    发明人： Michael S. Schlansker ,  B. Ramakrishna Rau ,  Rajiv Gupta ,  Joseph A. Fisher

    IPC分类号： G06F9/38 ,  G06F15/16

    CPC分类号： G06F9/3836 ,  G06F9/3838 ,  G06F9/3869

    摘要： A method and system are disclosed which allow a computer program to execute properly in object code compatible processing systems which have latencies different from those with which the program was created or compiled. This resulting compatibility of the computer program is achieved because the invention protects the precedence of operations within the computer program using latency assumptions which were used when creating the computer program. When the computer program is created, latency assumption information is efficiently provided within the computer program. Thereafter, when the computer program is executed, it is able to advise the processing system of the latency assumptions with which it was created. Various ways are described in which the processing system can utilize the latency assumptions when executing the computer program so as to ensure compatibility.

    摘要翻译： 公开了一种方法和系统，其允许计算机程序在目标代码兼容的处理系统中正确地执行，该处理系统的延迟与程序被创建或编译的时间不同。 实现计算机程序的这种兼容性是因为本发明使用在创建计算机程序时使用的延迟假设来保护计算机程序内的操作的优先级。 当创建计算机程序时，计算机程序内有效地提供延迟假设信息。 此后，当执行计算机程序时，能够向处理系统通知其创建的延迟假设。 描述了各种方式，其中处理系统可以在执行计算机程序时利用延迟假设，以确保兼容性。