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1.发明授权Process for selectively forming refractory metal silicide layers on semiconductor devices 失效在半导体器件上选择性地形成难熔金属硅化物层的工艺
公开(公告)号：US4285761A
公开(公告)日：1981-08-25
申请号：US164464
申请日：1980-06-30
IPC分类号： H01L29/78 , H01L21/28 , H01L21/306 , H01L21/311 , H01L21/3205 , H01L21/321 , H01L23/52 , H01L29/423 , H01L29/43 , H01L29/49 , H01L21/24
CPC分类号： H01L21/28061 , H01L21/31116 , H01L21/32105 , Y10S148/117 , Y10S148/14 , Y10S148/147 , Y10S438/911
摘要： A method of forming a refractory metal silicide pattern on a substrate by (1) forming a blanket layer of SiO.sub.2 on the substrate, (2) depositing a blanket layer of polycrystalline Si over the SiO.sub.2 layer, (3) defining a pattern in the blanket Si layer thereby exposing selected areas of the SiO.sub.2 layer, (4) depositing a blanket layer of refractory metal silicide on the substrate over the SiO.sub.2 and Si layers, (5) heating the substrate in an oxidizing environment to a temperature sufficient to oxidize the metal silicide layer over the Si to form an upper layer of SiO.sub.2 and to convert the metal silicide layer overlying the SiO.sub.2 layer to a metal rich SiO.sub.2 layer, andexposing the oxidized surface to an etchant that selectively etches away the metal rich SiO.sub.2 layer.
摘要翻译： （1）在基板上形成SiO 2的覆盖层，（2）在SiO 2层上沉积多晶硅的覆盖层的方法，（3）在覆盖层中限定图案的方法，在基板上形成难熔金属硅化物图案的方法 Si层，从而暴露SiO 2层的选定区域，（4）在SiO 2和Si层上在衬底上沉积难熔金属硅化物的覆盖层，（5）在氧化环境中将衬底加热到足以氧化金属的温度 硅化物层以形成SiO 2的上层，并且将覆盖在SiO 2层上的金属硅化物层转化为富金属的SiO 2层，并将氧化的表面暴露于选择性地蚀刻富金属SiO 2层的蚀刻剂。
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公开(公告)号：US06843894B2
公开(公告)日：2005-01-18
申请号：US10667814
申请日：2003-09-22
CPC分类号： C25D17/007 , C25D17/00 , C25D17/001
摘要： A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
摘要翻译： 阐述了一种使用电流窃电用于电镀晶片的阴极电流控制系统。 当前的小偷包括设置成基本上围绕晶片周边区域的多个导电段。 使用第一多个电阻器件，每个电阻器件与多个导电段中的相应一个相连。 电阻器件用于在晶片的电镀期间调节通过相应的导电指状物的电流。 各种结构用于当前的小偷，并且还可以在系统中使用诸如手指的其它导电元件。 与导电段一样，通过手指的电流也可以单独控制。 根据整个系统的一个实施例，根据预定的程序自动控制对各个电阻装置的电阻的选择。
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公开(公告)号：US06627051B2
公开(公告)日：2003-09-30
申请号：US09910299
申请日：2001-07-20
IPC分类号： C25D1700
CPC分类号： C25D21/12 , C25D7/123 , C25D17/001 , C25D17/005 , C25D17/007 , Y10S204/07
摘要： A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
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4.发明授权System, method and program for determining a network path by which to send a message 有权用于确定发送消息的网络路径的系统，方法和程序公开(公告)号：US09137043B2
公开(公告)日：2015-09-15
申请号：US11475578
申请日：2006-06-27
IPC分类号： H04L12/46 , H04L12/54 , H04L12/701 , H04L12/729 , H04L12/721 , H04L29/06
CPC分类号： H04L12/4641 , H04L12/5692 , H04L45/00 , H04L45/125 , H04L45/26 , H04L63/0272
摘要： System, method and program determining a network path by which a workstation can send a message to a target network. The workstation accesses a first part of the network path via a network access server. A plurality of other servers by which the workstation can access a second part of the network path leading to the target network are identified. Respective response times to communicate between the workstation or the network access server and each of the other servers are measured. A determination is made which one of the other servers has a shortest response time. The workstation attempts to connect to the one server, before attempting to connect to other of the other servers, to access the second part of the network. The second part of the network can be a virtual private network, and the other servers are entry point servers for respective virtual private networks.
摘要翻译： 确定工作站可以向目标网络发送消息的网络路径的系统，方法和程序。 工作站通过网络访问服务器访问网络路径的第一部分。 识别工作站可以访问通向目标网络的网络路径的第二部分的多个其他服务器。 测量工作站或网络访问服务器与每个其他服务器之间进行通信的相应响应时间。 确定其他服务器中的哪一个具有最短的响应时间。 在尝试连接到其他其他服务器之前，工作站会尝试连接到一个服务器，以访问网络的第二部分。 网络的第二部分可以是虚拟专用网络，其他服务器是各自虚拟专用网络的入口点服务器。
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公开(公告)号：US06437472B1
公开(公告)日：2002-08-20
申请号：US09715620
申请日：2000-11-17
申请人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
发明人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
IPC分类号： H02K1900
CPC分类号： H01F38/18 , Y10S204/07
摘要： A magnetic induction device having at least one secondary induction assembly including a secondary winding is mounted on a rotary element. A magnetic flux is induced the secondary induction assembly, causing an induced secondary alternating current in the secondary winding of the secondary induction assembly. The secondary alternating current is converting to direct current and is stored in an electrical storage device.
摘要翻译： 具有至少一个包括次级绕组的次感应组件的磁感应装置安装在旋转元件上。 引起磁通量的次级感应组件，从而在次级感应组件的次级绕组中产生感应的次级交流电流。 次级交流电转换为直流电并存储在电存储装置中。
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公开(公告)号：US06278210B1
公开(公告)日：2001-08-21
申请号：US09386079
申请日：1999-08-30
申请人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
发明人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
IPC分类号： H02K1900
CPC分类号： H01F38/18 , Y10S204/07
摘要： The method and apparatus for supplying power to a rotary element by magnetic induction. A magnetic induction device having at least one secondary induction assembly including a secondary winding is mounted on the rotary element. A magnetic flux is induced the secondary induction assembly, causing an induced alternating current in the secondary winding of the secondary induction assembly. The secondary alternating current is converting to direct current and is stored in an electrical storage device. A rotary cathode plater is disclosed as a particular application of the apparatus by which power is transferred to a storage battery or high capacity capacitor, without the use of wires.
摘要翻译： 用于通过磁感应向旋转元件供电的方法和装置。 具有至少一个包括次级绕组的次感应组件的磁感应装置安装在旋转元件上。 引起磁通量二次感应组件，从而在次级感应组件的次级绕组中产生感应的交流电流。 次级交流电转换为直流电并存储在电存储装置中。 公开了一种旋转阴极喷涂器作为将电力传送到蓄电池或高容量电容器而不使用电线的装置的具体应用。
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公开(公告)号：US5742452A
公开(公告)日：1998-04-21
申请号：US599401
申请日：1996-01-10
CPC分类号： G11B5/3106 , G11B5/3133 , G11B5/3163 , G11B5/3183 , G11B5/40 , G11B5/484 , G11B5/58
摘要： A integral magnetic head and suspension and method for making the same. The integral head and suspension are fabricated completely on silicon (Si) wafers using semiconductor processes. A N+ silicon layer is disposed over a P- silicon wafer. The N+ silicon layer and the P-silicon wafer are thermally oxidized to generate a bottom silicon oxide layer opposite the N+ layer side of the wafer and a top silicon oxide layer on the N+ side of the wafer, and to drive the N+ silicon into the P- silicon wafer. A layer of polysilicon is disposed over the silicon oxide layer on top of the N+ silicon layer and is then patterned to define the head structure and suspension structure as one piece. Then, a magnetic head is disposed on the polysilicon. Finally, the magnetic head and suspension are separated from the wafer by removing the first silicon oxide layer by a chemical etchant and the P- silicon wafer by selective etching. The head and suspension are released from the silicon wafer as a single structure using the above-described semiconductor processes. Accordingly, no grinding or cutting is used to define the dimensions of the head. Further, no processes are required to attach the head to the suspension and the suspension can be made from low mass materials such as silicon (Si) or Al.sub.2 O.sub.3.
摘要翻译： 一体化磁头和悬架及其制造方法。 使用半导体工艺，在硅（Si）晶片上完全制造整体式头和悬架。 N +硅层设置在P-硅晶片上。 N +硅层和P-硅晶片被热氧化以产生与晶片的N +层侧相对的底部氧化硅层和在晶片的N +侧上的顶部氧化硅层，并将N +硅驱入 P-硅晶片。 在N +硅层顶部的氧化硅层之上设置多晶硅层，然后将其图案化以将头部结构和悬挂结构定义为一体。 然后，在多晶硅上设置磁头。 最后，通过化学蚀刻剂和P-硅晶片通过选择性蚀刻去除第一氧化硅层，将磁头和悬浮液与晶片分离。 使用上述半导体工艺，头和悬浮液作为单一结构从硅晶片释放。 因此，不使用研磨或切割来限定头部的尺寸。 此外，不需要将头部附接到悬架上，并且悬架可以由诸如硅（Si）或Al 2 O 3的低质量材料制成。
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8.发明授权公开(公告)号：US06500316B1
公开(公告)日：2002-12-31
申请号：US09715724
申请日：2000-11-17
申请人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
发明人： Joseph J. Fatula, Jr. , Robert W. Hitzfeld , Richard Contreras , Guillermo Prada-Silva , Andrew Chiu , Rainer Schieferstein
IPC分类号： C25D1700
CPC分类号： H01F38/18 , Y10S204/07
摘要： An apparatus for rotary cathode electroplating having a head assembly, a substrate/thief assembly having a thieving ring which includes a number of individually chargeable segments, and a secondary induction assembly including a secondary core and a secondary winding. A motor drives the substrate/thief assembly to rotate relative to the head assembly. A controller directs electrical charge to each of the individually chargeable segments of the thieving ring. An electrical storage device stores electrical energy which is to be supplied to the controller. A charging apparatus induces a magnetic flux which induces an alternating current in the secondary winding of the secondary induction assembly. A converter converts the induced alternating current to direct current, which is then stored on the electrical storage device.
摘要翻译： 一种用于旋转阴极电镀的装置，其具有头部组件，具有包括多个可单独加载的节段的盗贼环的衬底/小窃贼组件，以及包括次级芯和次级绕组的次级感应组件。 马达驱动基板/窃贼组件相对于头部组件旋转。 控制器将电荷引导到盗窃环的每个可单独计费的段。 电存储装置存储要供给控制器的电能。 充电装置引起在二次感应组件的次级绕组中产生交流电流的磁通量。 A转换器将感应的交流电转换成直流电，然后存储在电存储装置上。
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公开(公告)号：US5920762A
公开(公告)日：1999-07-06
申请号：US915530
申请日：1997-08-15
CPC分类号： G11B5/3106 , G11B5/3133 , G11B5/3163 , G11B5/3183 , G11B5/40 , G11B5/484 , G11B5/58
摘要： A integral magnetic head and suspension and method for making the same. The integral head and suspension are fabricated completely on silicon (Si) wafers using semiconductor processes. A N+ silicon layer is disposed over a P- silicon wafer. The N+ silicon layer and the P- silicon wafer are thermally oxidized to generate a bottom silicon oxide layer opposite the N+ layer side of the wafer and a top silicon oxide layer on the N+ side of the wafer, and to drive the N+ silicon into the P- silicon wafer. A layer of polysilicon is disposed over the silicon oxide layer on top of the N+ silicon layer and is then patterned to define the head structure and suspension structure as one piece. Then, a magnetic head is disposed on the polysilicon. Finally, the magnetic head and suspension are separated from the wafer by removing the first silicon oxide layer by a chemical etchant and the P- silicon wafer by selective etching. The head and suspension are released from the silicon wafer as a single structure using the above-described semiconductor processes. Accordingly, no grinding or cutting is used to define the dimensions of the head. Further, no processes are required to attach the head to the suspension and the suspension can be made from low mass materials such as silicon (Si) or Al.sub.2 O.sub.3.
摘要翻译： 一体化磁头和悬架及其制造方法。 使用半导体工艺，在硅（Si）晶片上完全制造整体式头和悬架。 N +硅层设置在P-硅晶片上。 N +硅层和P-硅晶片被热氧化以产生与晶片的N +层侧相对的底部氧化硅层和晶片的N +侧的顶部氧化硅层，并将N +硅驱入 P-硅晶片。 在N +硅层顶部的氧化硅层之上设置多晶硅层，然后将其图案化以将头部结构和悬挂结构定义为一体。 然后，在多晶硅上设置磁头。 最后，通过化学蚀刻剂和P-硅晶片通过选择性蚀刻去除第一氧化硅层，将磁头和悬浮液与晶片分离。 使用上述半导体工艺，头和悬浮液作为单一结构从硅晶片释放。 因此，不使用研磨或切割来限定头部的尺寸。 此外，不需要将头部附接到悬架上，并且悬架可以由诸如硅（Si）或Al 2 O 3的低质量材料制成。
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公开(公告)号：US4397075A
公开(公告)日：1983-08-09
申请号：US165592
申请日：1980-07-03
IPC分类号： H01L29/74 , H01L21/306 , H01L21/3065 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H01L29/749 , H01L29/78 , H01L29/94 , H01L21/225
CPC分类号： H01L27/10861 , H01L21/30608 , H01L21/3065 , H01L27/10829 , H01L29/945
摘要： A dense, vertical MOS FET memory cell has a high charge storage capacitance per unit area of substrate surface. The charge storage capacitor structure is formed within a well etched in the silicon semiconductor substrate by a combination of reactive ion etching and a self-limiting wet etch.
摘要翻译： 密集的垂直MOS FET存储单元具有基板表面每单位面积的高电荷存储电容。 电荷存储电容器结构通过反应离子蚀刻和自限制湿法蚀刻的组合形成在硅半导体衬底中良好蚀刻的阱内。
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