公开(公告)号：US08872436B2

公开(公告)日：2014-10-28

申请号：US13615843

申请日：2012-09-14

申请人： Joung Yeal Kim ,  Su Jin Park ,  Young Hyun Jun

发明人： Joung Yeal Kim ,  Su Jin Park ,  Young Hyun Jun

IPC分类号： G05F1/10 ,  H05B37/02

CPC分类号： H02M3/07

摘要： A power supply device includes; first/second boost circuits that boost voltages applied to a first/second boost nodes in response to a first/second main signals, and respectively operated first/second transmission unit that control provision of boosted voltages to an output node. The power supply device also includes a bulk voltage controller connected between the boosted nodes and controlling a connection between the output node and a bulk node in response to a bulk control signal. Voltages respectively applied to the first and second transmission units are determined in response to an output node voltage, as well as the first/second main signals.

摘要翻译： 电源装置包括： 第一/第二升压电路，其响应于第一/第二主信号升压施加到第一/第二升压节点的电压，以及分别操作的第一/第二传输单元，其控制向输出节点提供升压电压。 电源装置还包括连接在升压节点之间的体电压控制器，并且响应于大容量控制信号来控制输出节点和体节点之间的连接。 分别施加到第一和第二传输单元的电压响应于输出节点电压以及第一/第二主信号而被确定。

公开(公告)号：US20100271069A1

公开(公告)日：2010-10-28

申请号：US12714878

申请日：2010-03-01

申请人： Joung Yeal Kim ,  Young Hyun Jun ,  Bai Sun Kong

发明人： Joung Yeal Kim ,  Young Hyun Jun ,  Bai Sun Kong

IPC分类号： H03K19/0175 ,  G11C7/00

CPC分类号： H04L25/0278 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/22 ,  H03K19/017509

摘要： An input/output circuit includes an I/O node connected to a pull up and pull down circuit having a pull up and pull down transistors. Data is sent and received at through the I/O node. A level shifter provides voltages including a supply voltage and a high voltage higher than the supply voltage. A signal control circuit controls the voltage level applied to the pull up and pull down circuit. During a data input mode, data is received at the I/O node and the pull up transistor is biased at the high voltage to cut off the pull up transistor. During a data output mode, data is output at the I/O node and the pull down transistor pulls down the I/O node to ground when the output data is low, and the pull up transistor is activated when the output data is high.

摘要翻译： 输入/输出电路包括连接到具有上拉和下拉晶体管的上拉和下拉电路的I / O节点。 通过I / O节点发送和接收数据。 电平移位器提供包括电源电压和高于电源电压的高电压的电压。 信号控制电路控制施加到上拉和下拉电路的电压电平。 在数据输入模式期间，在I / O节点处接收数据，并且上拉晶体管被偏置在高电压以截止上拉晶体管。 在数据输出模式下，在I / O节点输出数据，当输出数据为低电平时，下拉晶体管将I / O节点拉低至地，当输出数据为高电平时，上拉晶体管被激活。

公开(公告)号：US08004311B2

公开(公告)日：2011-08-23

申请号：US12714878

申请日：2010-03-01

申请人： Joung Yeal Kim ,  Young Hyun Jun ,  Bai Sun Kong

发明人： Joung Yeal Kim ,  Young Hyun Jun ,  Bai Sun Kong

IPC分类号： H03K19/0175

CPC分类号： H04L25/0278 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/22 ,  H03K19/017509

摘要： An input/output circuit includes an I/O node connected to a pull up and pull down circuit having a pull up and pull down transistors. Data is sent and received at through the I/O node. A level shifter provides voltages including a supply voltage and a high voltage higher than the supply voltage. A signal control circuit controls the voltage level applied to the pull up and pull down circuit. During a data input mode, data is received at the I/O node and the pull up transistor is biased at the high voltage to cut off the pull up transistor. During a data output mode, data is output at the I/O node and the pull down transistor pulls down the I/O node to ground when the output data is low, and the pull up transistor is activated when the output data is high.

摘要翻译： 输入/输出电路包括连接到具有上拉和下拉晶体管的上拉和下拉电路的I / O节点。 通过I / O节点发送和接收数据。 电平移位器提供包括电源电压和高于电源电压的高电压的电压。 信号控制电路控制施加到上拉和下拉电路的电压电平。 在数据输入模式期间，在I / O节点处接收数据，并且上拉晶体管被偏置在高电压以截止上拉晶体管。 在数据输出模式下，在I / O节点输出数据，当输出数据为低电平时，下拉晶体管将I / O节点拉低至地，当输出数据为高电平时，上拉晶体管被激活。