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    Semiconductor memory device and method for forming the same
    1.
    发明申请
    Semiconductor memory device and method for forming the same 审中-公开
    半导体存储器件及其形成方法

    公开(公告)号：US20080061334A1

    公开(公告)日：2008-03-13

    申请号：US11896952

    申请日：2007-09-07

    申请人： Ju-Young Jung ,  Suk-Ho Joo ,  Jung-Hoon Park ,  Heung-Jin Joo ,  Hee-San Kim ,  Seung-Kuk Kang ,  Do-Yeon Choi

    发明人： Ju-Young Jung ,  Suk-Ho Joo ,  Jung-Hoon Park ,  Heung-Jin Joo ,  Hee-San Kim ,  Seung-Kuk Kang ,  Do-Yeon Choi

    IPC分类号： H01L29/94 ,  H01L21/02

    CPC分类号： H01L27/11507 ,  H01L21/76849 ,  H01L21/7687 ,  H01L23/5226 ,  H01L27/11502 ,  H01L28/55 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor memory device and a method for forming the same. The method includes forming an insulating layer on a semiconductor substrate having a conductive region, forming a contact hole that exposes the conductive region by etching the insulating layer, forming a barrier metal layer that covers a sidewall and a bottom of the contact hole, and forming a contact plug in the contact hole by interposing the barrier metal layer therebetween. An etching process may be preformed that recesses the barrier metal layer and the contact plug in such a manner that a top surface of the contact plug protrudes upward beyond a top surface of the barrier metal layer. A capping plug may be formed covering the recessed barrier metal layer and the recessed contact plug. A capacitor may be formed on the capping plug.

    摘要翻译： 一种半导体存储器件及其形成方法。 该方法包括在具有导电区域的半导体衬底上形成绝缘层，形成通过蚀刻绝缘层而暴露导电区域的接触孔，形成覆盖接触孔的侧壁和底部的阻挡金属层，以及形成 通过在其间插入阻挡金属层，在接触孔中形成接触塞。 可以进行蚀刻工艺，其以使得接触插头的顶表面向上突出超过阻挡金属层的顶表面的方式使阻挡金属层和接触插塞凹陷。 可以形成覆盖凹陷的阻挡金属层和凹入的接触插塞的封盖塞。 可以在封盖上形成电容器。

    Contact structure having conductive oxide layer, ferroelectric random access memory device employing the same and methods of fabricating the same
    2.
    发明申请
    Contact structure having conductive oxide layer, ferroelectric random access memory device employing the same and methods of fabricating the same 审中-公开
    具有导电氧化物层的接触结构，采用该导电氧化物层的铁电随机存取存储器件及其制造方法

    公开(公告)号：US20080067566A1

    公开(公告)日：2008-03-20

    申请号：US11797138

    申请日：2007-05-01

    申请人： Do-Yeon Choi ,  Hee-San Kim ,  Heung-Jin Joo

    发明人： Do-Yeon Choi ,  Hee-San Kim ,  Heung-Jin Joo

    IPC分类号： H01L23/48 ,  H01L21/00 ,  H01L29/94

    CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/57

    摘要： A ferroelectric memory device may include a substrate, an interlayer insulating layer on the semiconductor substrate, a contact plug penetrating the interlayer insulating layer, the contact plug being formed of a sequentially stacked metal plug and buffer plug, a conductive protection pattern covering the contact plug, the conductive protection pattern being a conductive oxide layer, a lower electrode, a ferroelectric pattern, and an upper electrode sequentially stacked on the conductive protection pattern, and an insulating protection layer covering the sequentially stacked lower electrode, ferroelectric pattern, and upper electrode.

    摘要翻译： 铁电存储器件可以包括衬底，半导体衬底上的层间绝缘层，穿透层间绝缘层的接触插塞，接触插塞由顺序堆叠的金属插塞和缓冲插塞形成，覆盖接触插塞的导电保护图案 所述导电保护图案是导电性氧化物层，下部电极，铁电体图案和依次层叠在所述导电性保护图案上的上部电极，所述绝缘保护层覆盖顺序层叠的下部电极，铁电体图案和上部电极。