公开(公告)号：US20060170096A1

公开(公告)日：2006-08-03

申请号：US11047617

申请日：2005-02-02

申请人： Jun Yang ,  You Joo ,  Dong Jung

发明人： Jun Yang ,  You Joo ,  Dong Jung

IPC分类号： H01L23/34

CPC分类号： H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A chip scale package includes a patterned circuit layer attached to the active surface of a semiconductor chip through an anisotropic conductive adhesive layer such that contact pads on a lower surface of the patterned circuit layer are electrically coupled to corresponding bonding pads on the semiconductor chip. The patterned circuit layer has a plurality of openings formed therein at locations corresponding to the contact pads such that each of the contact pads has a portion exposed from an upper surface of the patterned circuit layer through the corresponding opening. A plurality of metal bumps are respectively disposed in the openings and mounted to the exposed portions of the contact pads for making external electrical connection. The present invention further provides a method for manufacturing the chip scale package at the wafer-level.

摘要翻译： 芯片级封装包括通过各向异性导电粘合剂层附着到半导体芯片的有源表面的图案化电路层，使得图案化电路层的下表面上的接触焊盘电耦合到半导体芯片上的对应焊盘。 图案化电路层在对应于接触焊盘的位置处具有形成在其中的多个开口，使得每个接触焊盘具有通过相应的开口从图案化电路层的上表面暴露的部分。 多个金属凸块分别设置在开口中并安装到接触垫的暴露部分以进行外部电连接。 本发明还提供了一种在晶片级制造芯片级封装的方法。

公开(公告)号：US20060145361A1

公开(公告)日：2006-07-06

申请号：US11028670

申请日：2005-01-05

申请人： Jun Yang ,  You Joo ,  Dong Jung

发明人： Jun Yang ,  You Joo ,  Dong Jung

IPC分类号： H01L23/28

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

公开(公告)号：US20080061407A1

公开(公告)日：2008-03-13

申请号：US11852079

申请日：2007-09-07

申请人： Jun Yang ,  You Joo ,  Dong Jung

发明人： Jun Yang ,  You Joo ,  Dong Jung

IPC分类号： H01L23/552 ,  H01L21/60

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package

摘要翻译： 半导体器件封装包括安装并电耦合到衬底的半导体器件，将半导体器件封装在衬底的上表面的一部分上的封装体; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。 本发明还提供了制造半导体器件封装的方法

公开(公告)号：US10660217B2

公开(公告)日：2020-05-19

申请号：US15993351

申请日：2018-05-30

申请人： Jun Yang ,  Tengyuan Zhang ,  Qiuquan Guo

发明人： Jun Yang ,  Tengyuan Zhang ,  Qiuquan Guo

IPC分类号： C23C18/16 ,  C23C18/40 ,  C23C18/30 ,  C23C18/28 ,  C23C18/20 ,  H05K3/42 ,  H05K1/03 ,  H05K3/12 ,  H05K1/09 ,  H05K3/18 ,  H05K3/38 ,  H05K1/18

摘要： Provided herein is a method to printed electronics, and more particularly related to printed electronics on flexible, porous substrates. The method includes applying a coating compound comprising poly (4-vinylpyridine) (P4VP) and SU-8 dissolved in an organic alcohol solution to one or more surface of a flexible, porous substrate, curing the porous substrate at a temperature of at least 130° C. such that the porous substrate is coated with a layer of said coating compound, printing a jet of a transition metal salt catalyst solution onto one or more printing sides of the flexible, porous substrate to deposit a transition metal salt catalyst onto the one or more printing sides, and submerging the substrate in an electroless metal deposition solution to deposit the metal on the flexible, porous substrate, wherein the deposited metal induces the formation of one or more three-dimensional metal-fiber conductive structures within the flexible, porous substrate.

公开(公告)号：US10593554B2

公开(公告)日：2020-03-17

申请号：US15941839

申请日：2018-03-30

申请人： Jun Yang

发明人： Jun Yang

IPC分类号： H01L21/67 ,  H01L21/687 ,  G02F1/13 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/683 ,  B24B37/10 ,  B24B37/005 ,  G05B19/418 ,  H01L21/66 ,  H01L21/02 ,  B24B37/20

摘要： A method and apparatus for within-wafer profile localized tuning is disclosed. In one aspect, the method includes providing a wafer attached to a rotating vacuum stage front side up, the wafer including a surface film with an incoming film thickness profile, providing a pad attached to a rotating head front side down, the head configured to sweep along a path, computing a film thickness removal amount based upon the incoming film thickness profile, and removing at least a portion of the surface film of the wafer based on the computed film thickness removal amount via a plurality of steps.

公开(公告)号：US20180226263A1

公开(公告)日：2018-08-09

申请号：US15941839

申请日：2018-03-30

申请人： Jun Yang

发明人： Jun Yang

IPC分类号： H01L21/3105 ,  H01L21/683 ,  H01L21/687 ,  G05B19/418 ,  B24B37/10 ,  B24B37/005

摘要： A method and apparatus for within-wafer profile localized tuning is disclosed. In one aspect, the method includes providing a wafer attached to a rotating vacuum stage front side up, the wafer including a surface film with an incoming film thickness profile, providing a pad attached to a rotating head front side down, the head configured to sweep along a path, computing a film thickness removal amount based upon the incoming film thickness profile, and removing at least a portion of the surface film of the wafer based on the computed film thickness removal amount via a plurality of steps.

公开(公告)号：US09748573B2

公开(公告)日：2017-08-29

申请号：US14236878

申请日：2012-08-03

申请人： Jun Yang ,  Pengfei Gao ,  Jingjun Zhang ,  Longjie Zhou

发明人： Jun Yang ,  Pengfei Gao ,  Jingjun Zhang ,  Longjie Zhou

IPC分类号： H01M4/36 ,  H01M4/38 ,  H01M4/04 ,  H01M4/62 ,  H01M4/583 ,  C01B33/00 ,  C01B33/06 ,  H01M4/587 ,  H01M4/1395 ,  H01M10/052

CPC分类号： H01M4/583 ,  C01B33/00 ,  C01B33/06 ,  H01M4/0428 ,  H01M4/0471 ,  H01M4/1395 ,  H01M4/364 ,  H01M4/366 ,  H01M4/386 ,  H01M4/587 ,  H01M4/625 ,  H01M10/052

摘要： A mesoporous silicon compound includes a mesoporous silicon phase, a metal silicide phase, and a carbon phase. The metal silicide is embedded in mesoporous silicon particles, the surfaces of which are coated with a carbon layer. A weight ratio of elemental silicon to the metal element is from 2:3 to 900:1. The pores of the mesoporous silicon particles have a size distribution from two nanometers to eighty nanometers.

公开(公告)号：US09663860B2

公开(公告)日：2017-05-30

申请号：US14005791

申请日：2012-03-17

申请人： Jun Yang ,  Pengfei Gao ,  Haiping Jia ,  Jiulin Wang ,  Yanna Nuli

发明人： Jun Yang ,  Pengfei Gao ,  Haiping Jia ,  Jiulin Wang ,  Yanna Nuli

IPC分类号： H01M4/36 ,  C23C18/12 ,  H01M4/133 ,  H01M4/134 ,  H01M4/1393 ,  H01M4/1395 ,  H01M10/052 ,  H01M4/38 ,  H01M4/587 ,  C23C16/26

CPC分类号： C23C18/1275 ,  C23C16/26 ,  H01M4/133 ,  H01M4/134 ,  H01M4/1393 ,  H01M4/1395 ,  H01M4/366 ,  H01M4/386 ,  H01M4/587 ,  H01M10/052

摘要： Disclosed in the invention are a silicon-carbon composite anode material for lithium ion batteries and a preparation method thereof The material consists of a porous silicon substrate and a carbon coating layer. The preparation method of the material comprises preparing a porous silicon substrate and a carbon coating layer. The silicon-carbon composite anode material for lithium ion batteries has the advantages of high reversible capacity, good cycle performance and good rate performance. The material respectively shows reversible capacities of 1,556 mAh, 1,290 mAh, 877 mAh and 474 mAh/g at 0.2 C, 1 C, 4 C and 15 C rates; the specific capacity remains above 1,500 mAh after 40 cycles at the rate of 0.2 C and the reversible capacity retention rate is up to 90 percent.

公开(公告)号：US20160353578A1

公开(公告)日：2016-12-01

申请号：US14552479

申请日：2014-11-24

申请人： Jun Yang

发明人： Jun Yang ,  Xiaolong Wang ,  Tengyuan Zhang ,  Qiuquan Guo

IPC分类号： H05K3/12 ,  H05K3/18

CPC分类号： H05K3/125 ,  H05K3/181 ,  H05K3/182 ,  H05K3/22 ,  H05K3/381 ,  H05K2201/2009 ,  H05K2203/0126 ,  H05K2203/013 ,  H05K2203/0709 ,  H05K2203/107 ,  H05K2203/1131 ,  H05K2203/1157 ,  H05K2203/1163 ,  H05K2203/1168 ,  H05K2203/125 ,  H05K2203/1355

摘要： This invention relates to fabrication of high quality printed electronics, particularly without the use of conductive inks, on various substrates by printing catalyst based inks followed by electroless deposition of metals. A method comprising substrate surface modification, preparing catalyst based inks, electroless deposition of a thick layer of metal and post-printing treatment is disclosed.

摘要翻译： 本发明涉及通过印刷催化剂基油墨然后进行无电沉积金属，在各种基材上制造高质量印刷电子产品，特别是不使用导电油墨。 公开了一种包括基材表面改性，制备催化剂基油墨，金属沉积金属和印后处理的方法。

公开(公告)号：US09496047B2

公开(公告)日：2016-11-15

申请号：US14011606

申请日：2013-08-27

申请人： Jun Yang ,  Hwong-Kwo Lin ,  Hua Chen ,  Yong Li ,  Ju Shen

发明人： Jun Yang ,  Hwong-Kwo Lin ,  Hua Chen ,  Yong Li ,  Ju Shen

IPC分类号： G11C7/12 ,  G11C17/08 ,  G11C7/20

CPC分类号： G11C17/08 ,  G11C7/20

摘要： In various embodiments, a memory cell and a memory are provided. The memory cell comprises a Static Random Access Memory (SRAM) cell including a reset-set (RS) flip-flop and a Read Only Memory (ROM) cell being connected (or coupled) to the SRAM cell to set logic states of internal latch nodes of the RS flip-flop when the ROM cell is triggered. The size of the memory cells proposed in an embodiment of the invention is much smaller than the sum of the size of ROM cells and the size of SRAM cells with the capacity of the memory cells same as the sum of the capacity of the ROM cells and the capacity of the SRAM cells.

摘要翻译： 在各种实施例中，提供存储器单元和存储器。 该存储单元包括一个静态随机存取存储器（SRAM）单元，它包括复位（RS）触发器和只读存储器（ROM）单元，该单元被连接（或耦合）到SRAM单元以设置内部锁存器的逻辑状态 当触发ROM单元时，RS触发器的节点。 在本发明的实施例中提出的存储器单元的尺寸远小于ROM单元的尺寸和SRAM单元的尺寸的总和，其中存储器单元的容量与ROM单元的容量和 SRAM单元的容量。