公开(公告)号：US5885356A

公开(公告)日：1999-03-23

申请号：US577862

申请日：1995-12-22

申请人： Jun Zhao ,  Tom Cho ,  Xin Sheng Guo ,  Atsushi Tabata ,  Jianmin Qiao ,  Alex Schreiber

发明人： Jun Zhao ,  Tom Cho ,  Xin Sheng Guo ,  Atsushi Tabata ,  Jianmin Qiao ,  Alex Schreiber

IPC分类号： C23C16/44 ,  C23C16/455 ,  C23C16/458 ,  C23C16/50 ,  C30B25/02 ,  H01J37/32 ,  H01L21/205 ,  H01L21/31 ,  H01L21/687 ,  C23C16/00 ,  B44C1/22

CPC分类号： H01J37/32834 ,  C23C16/4401 ,  C23C16/4412 ,  C23C16/45502 ,  C23C16/4586 ,  C23C16/463 ,  C30B25/02 ,  H01J37/32477 ,  H01J37/32724 ,  H01L21/68742 ,  H01L21/68785 ,  H01J2237/022 ,  Y10S156/916

摘要： The present invention provides a method and apparatus for limiting residue build-up by lining with a ceramic material the exhaust plenun and exhaust manifold of a processing chamber. In another aspect of the invention, the inventors have used an air gap between the ceramic liner and the processing chamber walls to increase the dielectric value of the ceramic liner, and further inhibit the build-up of residues. In another aspect, the ceramic liner has been found to retain sufficient heat to allow the elimination of heaters typically used to heat the aluminum walls during a clean operation, if the clean operation is commenced immediately after a process step so that the ceramic retains the necessary heat from the previous processing step. The provision of an air gap aids in this heating, preventing the ceramic heat from being drawn off by direct contact with the aluminum walls. In a preferred embodiment, the ceramic liners are attached to the chamber walls with TEFLON.RTM. (polytetrafluoroethylene) screws.

摘要翻译： 本发明提供了一种用于通过用陶瓷材料衬里处理室的排气增压和排气歧管来限制残余物堆积的方法和装置。 在本发明的另一方面，本发明人已经在陶瓷衬垫和处理室壁之间使用气隙来增加陶瓷衬里的介电值，并进一步抑制残留物的积聚。 在另一方面，已经发现陶瓷衬垫保持足够的热量，以便在清洁操作期间消除通常用于加热铝壁的加热器，如果在工艺步骤之后立即开始清洁操作，使得陶瓷保留必要的 来自前一处理步骤的热量。 提供气隙有助于这种加热，从而防止陶瓷热量与铝壁直接接触而被吸走。 在一个优选实施例中，陶瓷衬垫用TEFLON TM（聚四氟乙烯）螺钉连接到室壁。

公开(公告)号：US06635566B1

公开(公告)日：2003-10-21

申请号：US09593967

申请日：2000-06-15

申请人： Alain Blosse ,  Sanjay Thedki ,  Jianmin Qiao ,  Yitzhak Gilboa

发明人： Alain Blosse ,  Sanjay Thedki ,  Jianmin Qiao ,  Yitzhak Gilboa

IPC分类号： H01L214763

CPC分类号： H01L21/76801 ,  H01L21/31116 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76897 ,  H01L2221/1036

摘要： The invention concerns a method for forming metallization and contact structures in an integrated circuit. The method involoves the steps of etching a trench in the trench dielectric layer a trench dielectric layer of a composite structure containing a semiconductor substrate comprising an active region, a gate structure thereover, and dielectric spacers adjacent to the gate structure, a contact dielectric layer; and the trench dielectric layer; etching the contact dielectric layer under conditions which do not damage the gate structure to form a first contact opening that exposes a region of the semiconductor substrate; and depositing a conductive material into the contact opening and the trench.

摘要翻译： 本发明涉及在集成电路中形成金属化和接触结构的方法。 该方法有助于蚀刻沟槽电介质层中的沟槽的步骤，该沟槽电介质层包括包含有源区，其上的栅极结构和与该栅极结构相邻的电介质间隔区的半导体衬底的复合结构;接触电介质层; 和沟槽电介质层; 在不损坏栅极结构以形成暴露半导体衬底的区域的第一接触开口的条件下蚀刻接触电介质层; 以及将导电材料沉积到所述接触开口和所述沟槽中。

公开(公告)号：US06579420B2

公开(公告)日：2003-06-17

申请号：US09780212

申请日：2001-02-09

申请人： Zhimin Wan ,  Jiong Chen ,  Peiching Ling ,  Jianmin Qiao

发明人： Zhimin Wan ,  Jiong Chen ,  Peiching Ling ,  Jianmin Qiao

IPC分类号： C23C1600

CPC分类号： C23C14/505 ,  C23C14/044 ,  C23C14/46

摘要： A thin film deposition apparatus and method are disclosed in this invention. The apparatus includes a depositing thin-film particle source, a beam-defining aperture between the particle source and the deposited substrate(s), and a substrate holder to rotate the substrate(s) around its center and move the center along a lateral path so that the substrate(s) can scan across the particle beam from one substrate edge to the other edge. The method includes a step of providing a vacuum chamber for containing a thin-film particle source for generating thin-film particles to deposit a thin-film on the substrates. The method further includes a step of containing a substrate holder in the vacuum chamber for holding a plurality of substrates having a thin-film deposition surface of each substrate facing the beam of thin-film particles. The method further includes a step of providing a rotational means for rotating the substrate holder to rotate each of the substrates exposed to the thin-film particles for depositing a thin film thereon. And, the method further includes a step of providing a laterally reciprocal moving means for reciprocally moving said substrate holder for said beam traversing on said substrate holder from one side of the edge to the other side of the edge or at least passing through the central area of said substrate holder.

公开(公告)号：US06373679B1

公开(公告)日：2002-04-16

申请号：US09347437

申请日：1999-07-02

申请人： Jianmin Qiao ,  James E. Nulty ,  Paul Arleo ,  Siamak Salimian

发明人： Jianmin Qiao ,  James E. Nulty ,  Paul Arleo ,  Siamak Salimian

IPC分类号： H02N1300

CPC分类号： H01L21/67109 ,  H01L21/6831 ,  H01L21/6833 ,  H02N13/00

摘要： An electrostatic or mechanical chuck assembly includes gas inlets only in an annulus-shaped peripheral portion and not in the central region of the chuck. The gas inlets are in fluid communication with one or more gas conduits and supply of the backside of a workpiece, such as a semiconductor wafer, with inert coolant gas or gases. The gas or gases supplied only to the peripheral region of the chuck effectively cool the central region of the chuck by at least two physical mechanisms, including the thermal conduction through the workpiece and diffusion of the gas or gases in the interstitial space(s) between the somewhat irregular facing surfaces of the chuck and of the backside of the workpiece.

摘要翻译： 静电或机械卡盘组件包括仅在环形周边部分中的气体入口，而不包括在卡盘的中心区域中的气体入口。 气体入口与一个或多个气体管道流体连通，并且用惰性冷却剂气体或气体供应诸如半导体晶片的工件的背面。 仅供应到卡盘的周边区域的气体或气体通过至少两个物理机构有效地冷却卡盘的中心区域，包括通过工件的热传导和间隙空间中的气体或气体的扩散， 卡盘和工件背面有些不规则的面对表面。

公开(公告)号：US06372634B1

公开(公告)日：2002-04-16

申请号：US09333459

申请日：1999-06-15

申请人： Jianmin Qiao ,  Sanjay Thekdi ,  Manuj Rathor ,  James E. Nulty

发明人： Jianmin Qiao ,  Sanjay Thekdi ,  Manuj Rathor ,  James E. Nulty

IPC分类号： H01L213065

CPC分类号： H01L21/31116 ,  H01L21/76802 ,  H01L21/76816

摘要： A plasma etch chemistry and etch methodology is provided to improve critical dimension control for openings formed into and/or through a semiconductor thin film. According to an embodiment, the plasma etch chemistry includes an etchant mixture comprising a first etchant of the formula CxHyFz (where x≧2, y≧1 and z≧2) and a second etchant other than the first etchant to form the openings. The relationship of x, y and z may be such that y+z equals an even number ≦2x+2. According to an alternative embodiment, the plasma etch chemistry further includes strained cyclic (hydro)fluorocarbon. The plasma etch chemistry may be used to form openings in the layer in a single-etch step. In a further embodiment, the plasma etch chemistry described herein may etch less than the entire thickness of the layer, and a second plasma etch chemistry substantially free of the first etchant and strained cyclic (hydro)fluorocarbons etches the remainder of the layer to form the openings. Such an etch methodology advantageously reduces the risk of etching the materials underlying the layer.

摘要翻译： 提供等离子体蚀刻化学和蚀刻方法以改进形成于和/或穿过半导体薄膜的开口的临界尺寸控制。 根据实施例，等离子体蚀刻化学品包括蚀刻剂混合物，其包含式C x H y F z（其中x> = 2，y> = 1和z> = 2）的第一蚀刻剂和除第一蚀刻剂之外的第二蚀刻剂， 开口 x，y和z的关系可以使得y + z等于偶数<= 2x + 2。 根据替代实施例，等离子体蚀刻化学品还包括应变的环状（氢）氟碳化合物。 等离子体蚀刻化学可以用于在单蚀刻步骤中在层中形成开口。 在另一个实施方案中，本文所述的等离子体蚀刻化学蚀刻可以蚀刻小于层的整个厚度，并且基本上不含第一蚀刻剂的第二等离子体蚀刻化学品和应变的环状（氢）氟碳化物蚀刻该层的其余部分，形成 开口 这种蚀刻方法有利地降低了蚀刻层之下的材料的风险。

公开(公告)号：US5976900A

公开(公告)日：1999-11-02

申请号：US986371

申请日：1997-12-08

申请人： Jianmin Qiao ,  Guofu Jeff Feng

发明人： Jianmin Qiao ,  Guofu Jeff Feng

IPC分类号： C23C16/44 ,  H01L21/00 ,  G01R31/26 ,  H01L21/66

CPC分类号： H01L21/67028 ,  C23C16/4404 ,  Y10S438/905

摘要： A method of reducing impurities in films to be deposited within a chemical vapor deposition (CVD) device includes steps of cleaning the process chamber of the CVD device, and depositing, prior to wafer processing, a gettering layer of, for example, phosphorous containing glass on interior surfaces of the process chamber. The gettering layer getters mobile alkali ions and substantially reduces or prevents outdiffusion of alkali ions and other impurities. The phosphorous containing glass may also be doped with boron. A blocking layer, such as undoped silicate glass, silicon nitride, silicon oxynitride or the like may be deposited on the gettering layer to trap impurities and to prevent phosphorous contamination in a applications sensitive to such contamination. Alternatively, silicon nitride or silicon oxynitride may be deposited on interior surfaces of the process chamber without a gettering layer, to thereby substantially prevent outdiffusion of underlying moisture and impurities during subsequent deposition of films onto the wafers to be processed.

摘要翻译： 减少在化学气相沉积（CVD）器件中沉积的膜中的杂质的方法包括清洁CVD器件的处理室的步骤，以及在晶片处理之前沉积例如含磷玻璃的吸杂层 在处理室的内表面上。 吸气层吸收流动的碱离子，并大大减少或防止碱离子和其他杂质的扩散。 含磷玻璃也可以掺杂硼。 阻挡层，例如未掺杂的硅酸盐玻璃，氮化硅，氮氧化硅等可以沉积在吸气层上以捕获杂质并防止对这种污染敏感的应用中的磷污染。 或者，氮化硅或氮氧化硅可以沉积在处理室的内表面上而没有吸气层，从而基本上防止在随后将膜沉积到待处理的晶片上时潜在的水分和杂质的扩散。

公开(公告)号：US06734108B1

公开(公告)日：2004-05-11

申请号：US09405945

申请日：1999-09-27

申请人： Bo Jin ,  Jianmin Qiao ,  Shahin Sharifzadeh

发明人： Bo Jin ,  Jianmin Qiao ,  Shahin Sharifzadeh

IPC分类号： H01L21302

CPC分类号： H01L21/76897 ,  H01L21/02129 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/31116 ,  H01L21/31625

摘要： According to one embodiment (300), a method of forming a self-aligned contact can include forming adjacent conducting structures with sidewalls (302). A first insulating layer may then be formed without first forming a liner (304), such as a liner that is conventionally formed to protect underlying conducting structures and/or a substrate. A contact hole may then be etched between adjacent conducting structures (306). Contact structures may then be formed (308).

摘要翻译： 根据一个实施例（300），形成自对准接触的方法可以包括用侧壁（302）形成相邻的导电结构。 然后可以形成第一绝缘层，而不首先形成衬垫（304），例如通常形成以保护下面的导电结构和/或衬底的衬垫。 然后可以在相邻的导电结构（306）之间蚀刻接触孔。 然后可以形成接触结构（308）。

公开(公告)号：US06399512B1

公开(公告)日：2002-06-04

申请号：US09593968

申请日：2000-06-15

申请人： Alain Blosse ,  Sanjay Thedki ,  Jianmin Qiao ,  Yitzhak Gilboa

发明人： Alain Blosse ,  Sanjay Thedki ,  Jianmin Qiao ,  Yitzhak Gilboa

IPC分类号： H01L2100

CPC分类号： H01L21/76807 ,  H01L21/31116 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention concerns a method for simultaneously forming a metallization and contact structure in an integrated circuit. The method involves the steps of etching a trench dielectric layer of a composite structure having a semiconductor substrate with an active region, a gate structure thereon, at least one dielectric spacer adjacent to the gate structure, a contact dielectric layer over the semiconductor substrate, the gate structure and the dielectric spacer, an etch stop layer over the contact dielectric layer, and a trench dielectric layer over the etch stop layer, to form a trench in the trench dielectric under etch conditions which do not substantially etch the etch stop layer; thereafter, forming an opening in the etch stop layer and the contact dielectric layer by etching under conditions which do not damage the gate structure to expose the active region; and depositing a conductive material into the opening and the trench.

摘要翻译： 本发明涉及在集成电路中同时形成金属化和接触结构的方法。 该方法包括以下步骤：蚀刻具有半导体衬底的复合结构的沟槽电介质层，所述半导体衬底具有有源区，其上的栅极结构，与栅结构相邻的至少一个电介质衬垫，半导体衬底上的接触电介质层， 栅极结构和电介质间隔物，接触介电层上的蚀刻停止层以及蚀刻停止层上方的沟槽电介质层，以在基本不蚀刻蚀刻停止层的蚀刻条件下在沟槽电介质中形成沟槽; 然后在不损坏栅极结构以暴露有源区的条件下通过蚀刻在蚀刻停止层和接触电介质层中形成开口; 以及将导电材料沉积到开口和沟槽中。

公开(公告)号：US06350665B1

公开(公告)日：2002-02-26

申请号：US09561292

申请日：2000-04-28

申请人： Bo Jin ,  Jianmin Qiao

发明人： Bo Jin ,  Jianmin Qiao

IPC分类号： H01L213205

CPC分类号： H01L21/76897 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76895 ,  H01L29/6653

摘要： According to one embodiment (100), a method of manufacturing a semiconductor device may include forming diffusion regions in a substrate with a gate, first spacer, and second spacer as a diffusion mask (102). A second spacer may then be removed (104) prior to the formation of an interlayer dielectric. An interlayer dielectric may then be formed (106) over a gate structure and first spacer. A contact hole may then be etched through the interlayer dielectric that is self-aligned with the gate (108).

摘要翻译： 根据一个实施例（100），制造半导体器件的方法可以包括在具有栅极，第一间隔物和第二间隔物的衬底中形成扩散区域作为扩散掩模（102）。 然后可以在形成层间电介质之前去除第二间隔物（104）。 然后可以在栅极结构和第一间隔物上形成（106）层间电介质。 然后可以通过与栅极（108）自对准的层间电介质蚀刻接触孔。

公开(公告)号：US06322716B1

公开(公告)日：2001-11-27

申请号：US09385187

申请日：1999-08-30

申请人： Jianmin Qiao ,  Sanjay Thekdi

发明人： Jianmin Qiao ,  Sanjay Thekdi

IPC分类号： H01L21306

CPC分类号： H01J37/32862 ,  H01J37/321 ,  Y10S438/905

摘要： A method for conditioning a plasma etch chamber is presented. A plasma etch chamber is provided, which preferably includes a chuck for supporting a topography. A conditioning process may be performed in the etch chamber. The conditioning process preferably includes positioning a cover topography on or above the chuck. A conditioning feed gas containing (hydro)halocarbons may be introduced into the chamber. A conditioning plasma may be generated from the conditioning feed gas for a conditioning time. Immediately after generating the conditioning plasma is complete, the overall thickness of the cover topography is preferably at least as great as immediately before generating the conditioning plasma. By performing a conditioning process in such a manner, the total cost and complexity of the conditioning process may be reduced.

摘要翻译： 提出了一种用于调节等离子体蚀刻室的方法。 提供了等离子体蚀刻室，其优选地包括用于支撑地形的卡盘。 可以在蚀刻室中进行调节处理。 调理过程优选地包括将盖子的形貌定位在卡盘上或上方。 含有（氢）卤代烃的调节进料气体可以引入该室。 可以从调理进料气体产生调理等离子体用于调理时间。 在产生调理等离子体之后立即完成，覆盖形貌的总体厚度优选至少等于产生调理等离子体之前的厚度。 通过以这种方式进行调节处理，可以降低调节处理的总成本和复杂性。