利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

52 条记录 (耗时 0.02 秒)

    Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern
    1.
    发明申请
    Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern 有权
    具有统一图案的磁性随机存取存储器（MRAM）布局

    公开(公告)号：US20120087184A1

    公开(公告)日：2012-04-12

    申请号：US12901074

    申请日：2010-10-08

    申请人： Kangho Lee ,  Tae Hyun Kim ,  Xia Li ,  Jung Pill Kim ,  Seung H. Kang

    发明人： Kangho Lee ,  Tae Hyun Kim ,  Xia Li ,  Jung Pill Kim ,  Seung H. Kang

    IPC分类号： G11C11/14 ,  H01R43/00

    CPC分类号： G11C5/025 ,  G11C5/08 ,  G11C11/165 ,  H01L27/0207 ,  Y10T29/49117

    摘要： A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

    摘要翻译： 大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。 大规模存储器阵列中的子阵列由虚拟位单元分隔开。 信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度，使得信号分配电路占据与虚拟位单元相同的覆盖区，而不会破坏整个大规模阵列上的均匀图案。 类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围，以进一步减少图案负载影响。

    Magnetic Random Access Memory (MRAM) Read With Reduced Disburb Failure
    4.
    发明申请
    Magnetic Random Access Memory (MRAM) Read With Reduced Disburb Failure 有权
    磁性随机存取存储器（MRAM）读取具有减少的扰乱故障

    公开(公告)号：US20120218815A1

    公开(公告)日：2012-08-30

    申请号：US13035006

    申请日：2011-02-25

    申请人： Jung Pill Kim ,  Tae Hyun Kim ,  Kangho Lee

    发明人： Jung Pill Kim ,  Tae Hyun Kim ,  Kangho Lee

    IPC分类号： G11C11/14

    CPC分类号： G11C11/1673 ,  G11C11/1693

    摘要： Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ.

    摘要翻译： 磁流体随机存取存储器（MRAM）中的磁隧道结（MTJ）在经过MTJ的电流导致由于自旋转移转矩（STT）从平行状态到抗反射的MTJ自发切换时，受到读取干扰事件， 平行状态或从反平行状态到并行状态。 因为MTJ的状态对应于存储的数据，读取干扰事件可能导致MRAM设备中的数据丢失。 通过控制通过MTJ的电流的方向可以减少读取干扰事件。 例如，可以基于参考MTJ的状态来选择通过参考MTJ的当前方向。 在另一示例中，可以交替通过数据或参考MTJ的当前方向，使得MTJ仅在MTJ上的大约一半的读取操作期间经受读取干扰事件。

    Magnetic random access memory (MRAM) read with reduced disturb failure
    6.
    发明授权
    Magnetic random access memory (MRAM) read with reduced disturb failure 有权
    磁性随机存取存储器（MRAM）以减少的干扰故障读取

    公开(公告)号：US08570797B2

    公开(公告)日：2013-10-29

    申请号：US13035006

    申请日：2011-02-25

    申请人： Jung Pill Kim ,  Tae Hyun Kim ,  Kangho Lee

    发明人： Jung Pill Kim ,  Tae Hyun Kim ,  Kangho Lee

    IPC分类号： G11C11/14

    CPC分类号： G11C11/1673 ,  G11C11/1693

    摘要： Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ.

    摘要翻译： 磁流体随机存取存储器（MRAM）中的磁隧道结（MTJ）在经过MTJ的电流导致由于自旋转移转矩（STT）从平行状态到抗反射的MTJ自发切换时，受到读取干扰事件， 平行状态或从反平行状态到并行状态。 因为MTJ的状态对应于存储的数据，读取干扰事件可能导致MRAM设备中的数据丢失。 通过控制通过MTJ的电流的方向可以减少读取干扰事件。 例如，可以基于参考MTJ的状态来选择通过参考MTJ的当前方向。 在另一示例中，可以交替通过数据或参考MTJ的当前方向，使得MTJ仅在MTJ上的大约一半的读取操作期间经受读取干扰事件。

    Magnetic random access memory (MRAM) layout with uniform pattern
    8.
    发明授权
    Magnetic random access memory (MRAM) layout with uniform pattern 有权
    具有均匀图案的磁性随机存取存储器（MRAM）布局

    公开(公告)号：US08441850B2

    公开(公告)日：2013-05-14

    申请号：US12901074

    申请日：2010-10-08

    申请人： Kangho Lee ,  Tae Hyun Kim ,  Xia Li ,  Jung Pill Kim ,  Seung H. Kang

    发明人： Kangho Lee ,  Tae Hyun Kim ,  Xia Li ,  Jung Pill Kim ,  Seung H. Kang

    IPC分类号： G11C11/14

    CPC分类号： G11C5/025 ,  G11C5/08 ,  G11C11/165 ,  H01L27/0207 ,  Y10T29/49117

    摘要： A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

    摘要翻译： 大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。 大规模存储器阵列中的子阵列由虚拟位单元分隔开。 信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度，使得信号分配电路占据与虚拟位单元相同的覆盖区，而不会破坏整个大规模阵列上的均匀图案。 类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围，以进一步减少图案负载影响。

    Multi-level memory cell using multiple magnetic tunnel junctions with varying MGO thickness
    9.
    发明授权
    Multi-level memory cell using multiple magnetic tunnel junctions with varying MGO thickness 有权
    使用具有不同MGO厚度的多个磁隧道结的多层存储单元

    公开(公告)号：US09047964B2

    公开(公告)日：2015-06-02

    申请号：US13589315

    申请日：2012-08-20

    申请人： Kangho Lee ,  Taehyun Kim ,  Jung Pill Kim ,  Seung H. Kang

    发明人： Kangho Lee ,  Taehyun Kim ,  Jung Pill Kim ,  Seung H. Kang

    IPC分类号： G11C11/00 ,  G11C11/16 ,  G11C11/56 ,  H01L21/00

    CPC分类号： G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5607 ,  H01L21/00

    摘要： A Multi-Level Memory Cell (MLC) using multiple Magnetic Tunnel Junction (MTJ) structures having one or more layers with varying thickness is disclosed. The multiple MTJ structures, which are vertically stacked and arranged in series, may have substantially identical area dimensions to minimize fabrication costs because one mask can be used to pattern the multiple MTJ structures. Further, varying the thicknesses associated with the one or more layers may provide the multiple MTJ structures with different switching current densities and thereby increase memory density and improve read and write operations. In one embodiment, the layers with the varying thicknesses may include tunnel barriers or magnesium oxide layers associated with the multiple MTJ structures and/or free layers associated with the multiple MTJ structures.

    摘要翻译： 公开了使用具有一层或多层具有变化厚度的多个磁隧道结（MTJ）结构的多层存储单元（MLC）。 垂直堆叠和串联布置的多个MTJ结构可以具有基本上相同的面积尺寸以最小化制造成本，因为可以使用一个掩模来对多个MTJ结构进行图案化。 此外，改变与一个或多个层相关联的厚度可以为多个MTJ结构提供不同的开关电流密度，从而增加存储器密度并改善读取和写入操作。 在一个实施例中，具有变化厚度的层可以包括与多个MTJ结构相关联的隧道势垒或氧化镁层，和/或与多个MTJ结构相关联的自由层。