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公开(公告)号：US09391272B2
公开(公告)日：2016-07-12
申请号：US14458785
申请日：2014-08-13
CPC分类号： H01L45/14 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1253 , H01L45/1266 , H01L45/148 , H01L45/1616
摘要： According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer.
摘要翻译： 根据一个实施例，非易失性可变电阻元件包括第一电极，第二电极，可变电阻层和电介质层。 第二电极包括金属元件。 可变电阻层设置在第一电极和第二电极之间。 根据使金属元件进出的可变电阻层，电阻变化是可逆的。 电介质层插入在第二电极和可变电阻层之间，并且金属元素的扩散系数小于可变电阻层的扩散系数。
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公开(公告)号：US20140167133A1
公开(公告)日：2014-06-19
申请号：US14108633
申请日：2013-12-17
发明人： Izumi HIRANO , Yuichiro Mitani , Masayasu Miyata , Yasushi Nakasaki , Koichi Kato , Daisuke Matsushita , Akira Takashima , Misako Morota
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L29/42332 , H01L29/511 , H01L29/7881 , H01L29/7889
摘要： A nonvolatile semiconductor memory according to an embodiment includes: a semiconductor region; a first insulating film formed on the semiconductor region; a charge storage film formed on the first insulating film; a hydrogen diffusion preventing film formed on the charge storage film; a second insulating film formed on the hydrogen diffusion preventing film; a control gate electrode formed on the second insulating film; a hydrogen discharge film formed on the control gate electrode; and a sidewall formed on a side surface of a multilayer structure including the first insulating film, the charge storage film, the hydrogen diffusion preventing film, the second insulating film, and the control gate electrode, the sidewall containing a material for preventing hydrogen from diffusing.
摘要翻译： 根据实施例的非易失性半导体存储器包括：半导体区域; 形成在半导体区域上的第一绝缘膜; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的氢扩散防止膜; 在氢扩散防止膜上形成的第二绝缘膜; 形成在所述第二绝缘膜上的控制栅电极; 形成在控制栅电极上的氢放电膜; 以及形成在包括第一绝缘膜，电荷存储膜，氢扩散防止膜，第二绝缘膜和控制栅电极的多层结构的侧表面上的侧壁，所述侧壁包含用于防止氢扩散的材料 。
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公开(公告)号：US09147469B2
公开(公告)日：2015-09-29
申请号：US14602851
申请日：2015-01-22
IPC分类号： G11C13/00
CPC分类号： G11C13/0097 , G11C13/0002 , G11C13/0011 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/0088 , G11C2213/33 , G11C2213/77
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections.
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4.发明授权Nonvolatile semiconductor memory device including variable resistance element 有权包括可变电阻元件的非易失性半导体存储器件公开(公告)号：US08854874B2
公开(公告)日：2014-10-07
申请号：US13966985
申请日：2013-08-14
IPC分类号： G11C13/00
CPC分类号： G11C13/0097 , G11C13/0002 , G11C13/0011 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/0088 , G11C2213/33 , G11C2213/77
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections.
摘要翻译： 根据一个实施例，非易失性半导体存储器件包括存储单元阵列和控制电路。 存储单元阵列包括各自包括可变电阻元件的存储单元，其中在复位操作中流动的复位电流小于在设定操作中流动的设定电流不小于一个数量级。 控制电路对存储单元执行复位操作和设置操作。 控制电路对处于低电阻状态的所有存储单元执行复位操作，并连接到所选择的第一互连和所选择的第二互连。
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公开(公告)号：US08835896B2
公开(公告)日：2014-09-16
申请号：US13970169
申请日：2013-08-19
IPC分类号： H01L47/00
CPC分类号： H01L45/14 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1253 , H01L45/1266 , H01L45/148 , H01L45/1616
摘要： According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer.
摘要翻译： 根据一个实施例，非易失性可变电阻元件包括第一电极，第二电极，可变电阻层和电介质层。 第二电极包括金属元件。 可变电阻层设置在第一电极和第二电极之间。 根据使金属元件进出的可变电阻层，电阻变化是可逆的。 电介质层插入在第二电极和可变电阻层之间，并且金属元素的扩散系数小于可变电阻层的扩散系数。
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公开(公告)号：US20140021528A1
公开(公告)日：2014-01-23
申请号：US13944989
申请日：2013-07-18
发明人： Masao Shingu , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788 , H01L29/66
CPC分类号： H01L29/788 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/513 , H01L29/66825
摘要： A semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO2, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge
摘要翻译： 半导体器件包括：半导体区域; 多个堆叠结构，其各自设置在所述半导体区域上，并且具有依次堆叠的隧道绝缘膜，电荷存储层，上绝缘层和控制电极; 设置在所述多个堆叠结构的侧面上的元件隔离绝缘层; 以及设置在半导体区域和多个堆叠结构中的源极 - 漏极区域。 元件隔离绝缘层包括SiO 2，SiN和SiON中的至少一种，上绝缘层是含有选自稀土金属，Y，Zr和Hf中的至少一种金属M的氧化物，Si ，并且沟道长度方向上的电荷存储层，上绝缘层和控制电极的各自的长度Lcharge，Ltop和Lgate满足关系“Lcharge
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公开(公告)号：US09349876B2
公开(公告)日：2016-05-24
申请号：US14108633
申请日：2013-12-17
发明人： Izumi Hirano , Yuichiro Mitani , Masayasu Miyata , Yasushi Nakasaki , Koichi Kato , Daisuke Matsushita , Akira Takashima , Misako Morota
IPC分类号： H01L29/792 , H01L21/28 , H01L27/115 , H01L29/423 , H01L29/51 , H01L29/788
CPC分类号： H01L29/792 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L29/42332 , H01L29/511 , H01L29/7881 , H01L29/7889
摘要： A nonvolatile semiconductor memory according to an embodiment includes: a semiconductor region; a first insulating film formed on the semiconductor region; a charge storage film formed on the first insulating film; a hydrogen diffusion preventing film formed on the charge storage film; a second insulating film formed on the hydrogen diffusion preventing film; a control gate electrode formed on the second insulating film; a hydrogen discharge film formed on the control gate electrode; and a sidewall formed on a side surface of a multilayer structure including the first insulating film, the charge storage film, the hydrogen diffusion preventing film, the second insulating film, and the control gate electrode, the sidewall containing a material for preventing hydrogen from diffusing.
摘要翻译： 根据实施例的非易失性半导体存储器包括：半导体区域; 形成在半导体区域上的第一绝缘膜; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的氢扩散防止膜; 在氢扩散防止膜上形成的第二绝缘膜; 形成在所述第二绝缘膜上的控制栅电极; 形成在控制栅电极上的氢放电膜; 以及形成在包括第一绝缘膜，电荷存储膜，氢扩散防止膜，第二绝缘膜和控制栅电极的多层结构的侧表面上的侧壁，所述侧壁包含用于防止氢扩散的材料 。
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公开(公告)号：US20130328009A1
公开(公告)日：2013-12-12
申请号：US13970169
申请日：2013-08-19
IPC分类号： H01L45/00
CPC分类号： H01L45/14 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1253 , H01L45/1266 , H01L45/148 , H01L45/1616
摘要： According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer.
摘要翻译： 根据一个实施例，非易失性可变电阻元件包括第一电极，第二电极，可变电阻层和电介质层。 第二电极包括金属元件。 可变电阻层设置在第一电极和第二电极之间。 根据使金属元件进出的可变电阻层，电阻变化是可逆的。 电介质层插入在第二电极和可变电阻层之间，并且金属元素的扩散系数小于可变电阻层的扩散系数。
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公开(公告)号：US09536583B2
公开(公告)日：2017-01-03
申请号：US14948709
申请日：2015-11-23
发明人： Tomoaki Inokuchi , Mizue Ishikawa , Hideyuki Sugiyama , Tetsufumi Tanamoto , Akira Takashima , Yoshiaki Saito
IPC分类号： G11C11/16 , G11C5/12 , H01L29/82 , H01L29/66 , H01L43/08 , G11C11/56 , G11C19/08 , G11C13/00 , H01L27/22
CPC分类号： G11C11/161 , G11C11/16 , G11C11/1673 , G11C11/1675 , G11C11/2275 , G11C11/5607 , G11C13/0069 , G11C19/0808 , H01L27/222 , H01L27/224 , H01L29/66984 , H01L29/82 , H01L43/08
摘要： A magnetic memory according to an embodiment includes: a multilayer structure including a semiconductor layer and a first ferromagnetic layer; a first wiring line electrically connected to the semiconductor layer; a second wiring line electrically connected to the first ferromagnetic layer; and a voltage applying unit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the first ferromagnetic layer during a write operation, a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.
摘要翻译： 根据实施例的磁存储器包括：包括半导体层和第一铁磁层的多层结构; 电连接到所述半导体层的第一布线; 电连接到第一铁磁层的第二布线; 以及电压施加单元，电连接在第一布线和第二布线之间，以在写入操作期间在半导体层和第一铁磁层之间施加第一电压，第一铁磁层的磁化方向可通过施加第一 电压。
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公开(公告)号：US09230625B2
公开(公告)日：2016-01-05
申请号：US14204422
申请日：2014-03-11
发明人： Tomoaki Inokuchi , Mizue Ishikawa , Hideyuki Sugiyama , Tetsufumi Tanamoto , Akira Takashima , Yoshiaki Saito
CPC分类号： G11C11/161 , G11C11/16 , G11C11/1673 , G11C11/1675 , G11C11/2275 , G11C11/5607 , G11C13/0069 , G11C19/0808 , H01L27/222 , H01L27/224 , H01L29/66984 , H01L29/82 , H01L43/08
摘要： A magnetic memory according to an embodiment includes: a multilayer structure including a semiconductor layer and a first ferromagnetic layer; a first wiring line electrically connected to the semiconductor layer; a second wiring line electrically connected to the first ferromagnetic layer; and a voltage applying unit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the first ferromagnetic layer during a write operation, a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.
摘要翻译： 根据实施例的磁存储器包括：包括半导体层和第一铁磁层的多层结构; 电连接到所述半导体层的第一布线; 电连接到第一铁磁层的第二布线; 以及电压施加单元，电连接在第一布线和第二布线之间，以在写入操作期间在半导体层和第一铁磁层之间施加第一电压，第一铁磁层的磁化方向可通过施加第一 电压。
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