FERROELECTRIC MEMORY AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    FERROELECTRIC MEMORY AND MANUFACTURING METHOD THEREOF 审中-公开
    电磁记忆及其制造方法

    公开(公告)号:US20140070289A1

    公开(公告)日:2014-03-13

    申请号:US14016771

    申请日:2013-09-03

    IPC分类号: H01L43/10

    摘要: According to one embodiment, a ferroelectric memory includes a gate insulation film formed on a semiconductor substrate, a ferroelectric film formed on the gate insulation film, and a control electrode formed on the ferroelectric film. The ferroelectric film is a film containing a metal, which is hafnium or zirconium, and oxygen, and contains an element other than the metal at a concentration lower than a concentration of the metal.

    摘要翻译: 根据一个实施例,铁电存储器包括形成在半导体衬底上的栅极绝缘膜,形成在栅极绝缘膜上的铁电膜以及形成在铁电体膜上的控制电极。 铁电体膜是含有铪或锆的金属和氧,并且含有浓度低于金属浓度的金属以外的元素的膜。

    Semiconductor Device and Manufacturing Method

    公开(公告)号:US20180069112A1

    公开(公告)日:2018-03-08

    申请号:US15462363

    申请日:2017-03-17

    发明人: Seiji INUMIYA

    摘要: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, a gate electrode, an aluminum oxynitride layer provided between the gate electrode and the second nitride semiconductor layer, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a first aluminum nitride layer provided on the second nitride semiconductor layer between the first electrode and the aluminum oxynitride layer, and a second aluminum nitride layer provided on the second nitride semiconductor layer between the second electrode and the aluminum oxynitride layer. The second nitride semiconductor layer has an electron affinity lower than that of the first nitride semiconductor layer. A second electrode sandwiches the gate electrode together with the first electrode.

    SEMICONDUCTOR STORAGE DEVICE
    3.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 审中-公开
    半导体存储设备

    公开(公告)号:US20150179657A1

    公开(公告)日:2015-06-25

    申请号:US14481297

    申请日:2014-09-09

    发明人: Seiji INUMIYA

    摘要: A semiconductor storage device is provided with a semiconductor channel region; a first insulating layer including an oxide film disposed in contact with the semiconductor channel region, an yttrium oxide containing film disposed on the oxide film, and a hafnium oxide film having an orthorhombic phase III structure disposed on the yttrium oxide containing film; and a control electrode disposed on the first insulating layer.

    摘要翻译: 半导体存储装置设置有半导体沟道区域; 包括与半导体沟道区域接触的氧化物膜的第一绝缘层,设置在氧化物膜上的含氧化钇膜和在含氧化钇膜上设置的具有正交晶相III结构的氧化铪膜; 以及设置在所述第一绝缘层上的控制电极。

    FERROELECTRIC MEMORY AND MANUFACTURING METHOD OF THE SAME
    4.
    发明申请
    FERROELECTRIC MEMORY AND MANUFACTURING METHOD OF THE SAME 有权
    其电磁记忆及其制造方法

    公开(公告)号:US20140070290A1

    公开(公告)日:2014-03-13

    申请号:US14020262

    申请日:2013-09-06

    IPC分类号: H01L43/10 H01L43/12

    摘要: According to one embodiment, a ferroelectric memory includes a semiconductor layer, an interfacial insulating film formed on the semiconductor layer, a ferroelectric film formed on the interfacial insulating film, and a gate electrode formed on the ferroelectric film, wherein the ferroelectric film is a film which includes a metal that is hafnium (Hf) or zirconium (Zr) and oxygen as the main components and to which an element selected from the group consisting of silicon (Si), magnesium (Mg), aluminum (Al).

    摘要翻译: 根据一个实施例,铁电存储器包括半导体层,形成在半导体层上的界面绝缘膜,形成在界面绝缘膜上的铁电膜,以及形成在强电介质膜上的栅电极,其中铁电膜是膜 其包括铪(Hf)或锆(Zr)和氧作为主要成分的金属,并且选自硅(Si),镁(Mg),铝(Al)的元素。

    SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20190296138A1

    公开(公告)日:2019-09-26

    申请号:US16120042

    申请日:2018-08-31

    摘要: A semiconductor apparatus according to the present embodiment is a semiconductor apparatus including a first nitride semiconductor layer including a first region having a first upper surface, a second region having a second upper surface parallel to the first upper surface, and a third region provided between the first region and the second region and having a third upper surface inclined with respect to the first upper surface and the second upper surface; a second nitride semiconductor layer including a fourth upper surface provided above the first upper surface, a fifth upper surface provided above the second upper surface, and a sixth upper surface provided above the third upper surface and being parallel to the third upper surface, the fourth upper surface being parallel to the first upper surface and being a +c face, the fifth upper surface parallel to the second upper surface and being a +c face, and the second nitride semiconductor having a bandgap larger than that of the first nitride semiconductor layer; a source electrode provided on the fourth upper surface; a drain electrode provided on the fifth upper surface; a gate electrode provided on the sixth upper surface; and a gate insulating film provided between the sixth upper surface and the gate electrode.