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公开(公告)号：US20080162798A1
公开(公告)日：2008-07-03
申请号：US12038666
申请日：2008-02-27
IPC分类号： G06F12/00
CPC分类号： G11C16/3495 , G06F12/0246 , G06F2212/1036 , G06F2212/7211 , G11C8/12 , G11C16/349
摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
摘要翻译： 由闪存电可擦除和可编程只读存储器（“EEPROM”）组成的块的大容量存储系统被组合成块，这些块又被分组到存储体中，以便管理存储器经历的擦除和重写周期的数量 银行为了延长内存系统的使用寿命。 由于这种类型的存储器单元在有限数量的擦除和重写周期之后变得不可用，尽管在数万个周期中，避免了不均匀地使用存储器组，使得整个存储器不会变得不起作用，因为它的一个存储体具有 达到了终点，而其他银行也没有被使用。 监视存储器组的相对使用，并且响应于不均匀使用的检测，使它们的物理地址彼此周期性交换，以便在存储器的使用寿命期内甚至使用它们。
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公开(公告)号：US6081447A
公开(公告)日：2000-06-27
申请号：US262813
申请日：1999-03-05
CPC分类号： G11C16/3495 , G06F12/0246 , G11C16/349 , G11C8/12 , G06F2212/1036 , G06F2212/7211
摘要： A mass storage system made of flash electrically erasable and programmable read only memory ("EEPROM") cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
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公开(公告)号：US07353325B2
公开(公告)日：2008-04-01
申请号：US11028882
申请日：2005-01-03
IPC分类号： G06F12/02
CPC分类号： G11C16/3495 , G06F12/0246 , G06F2212/1036 , G06F2212/7211 , G11C8/12 , G11C16/349
摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
摘要翻译： 由闪存电可擦除和可编程只读存储器（“EEPROM”）组成的块的大容量存储系统被组合成块，这些块又被分组到存储体中，以便管理存储器经历的擦除和重写周期的数量 银行为了延长内存系统的使用寿命。 由于这种类型的存储器单元在有限数量的擦除和重写周期之后变得不可用，尽管在数万个周期中，避免了不均匀地使用存储器组，使得整个存储器不会变得不起作用，因为它的一个存储体具有 达到了终点，而其他银行也没有被使用。 监视存储器组的相对使用，并且响应于不均匀使用的检测，使它们的物理地址彼此周期性交换，以便在存储器的使用寿命期内甚至使用它们。
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公开(公告)号：US06594183B1
公开(公告)日：2003-07-15
申请号：US09108084
申请日：1998-06-30
IPC分类号： G11C1604
CPC分类号： G11C16/3495 , G06F12/0246 , G06F2212/1036 , G06F2212/7211 , G11C8/12 , G11C16/349
摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
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公开(公告)号：US06850443B2
公开(公告)日：2005-02-01
申请号：US10428422
申请日：2003-05-02
CPC分类号： G11C16/3495 , G06F12/0246 , G06F2212/1036 , G06F2212/7211 , G11C8/12 , G11C16/349
摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
摘要翻译： 由闪存电可擦除和可编程只读存储器（“EEPROM”）组成的块的大容量存储系统被组合成块，这些块又被分组到存储体中，以便管理存储器经历的擦除和重写周期的数量 银行为了延长内存系统的使用寿命。 由于这种类型的存储器单元在有限数量的擦除和重写周期之后变得不可用，尽管在数万个周期中，避免了不均匀地使用存储器组，使得整个存储器不会变得不起作用，因为它的一个存储体具有 达到了终点，而其他银行也没有被使用。 监视存储器组的相对使用，并且响应于不均匀使用的检测，使它们的物理地址彼此周期性交换，以便在存储器的使用寿命期内甚至使用它们。
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公开(公告)号：US06230233B1
公开(公告)日：2001-05-08
申请号：US07759212
申请日：1991-09-13
IPC分类号： G06F1202
CPC分类号： G11C16/3495 , G06F12/0246 , G06F2212/1036 , G06F2212/7211 , G11C8/12 , G11C16/349
摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
摘要翻译： 由闪存电可擦除和可编程只读存储器（“EEPROM”）组成的块的大容量存储系统被组合成块，这些块又被分组到存储体中，以便管理存储器经历的擦除和重写周期的数量 银行为了延长内存系统的使用寿命。 由于这种类型的存储器单元在有限数量的擦除和重写周期之后变得不可用，尽管在数万个周期中，避免了不均匀地使用存储器组，使得整个存储器不会变得不起作用，因为它的一个存储体具有 达到了终点，而其他银行也没有被使用。 监视存储器组的相对使用，并且响应于不均匀使用的检测，使它们的物理地址彼此周期性交换，以便在存储器的使用寿命期内甚至使用它们。
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公开(公告)号：US07688643B2
公开(公告)日：2010-03-30
申请号：US10809061
申请日：2004-03-24
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solidstate memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译： 存储器系统包括固态存储器件的阵列，其经由具有极少行的器件总线与控制器模块通信并处于控制器模块的控制之下。 这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。 命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。 串行化信息伴随着一个控制信号，以帮助整理复用的组件。 阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。 通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。 使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。 通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。 读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址 寻址内存系统。
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公开(公告)号：US5471478A
公开(公告)日：1995-11-28
申请号：US401942
申请日：1995-03-10
申请人： John S. Mangan , Robert D. Norman , Jeffrey Craig , Richard Albert , Anil Gupta , Jeffrey D. Stai , Karl M. J. Lofgren
发明人： John S. Mangan , Robert D. Norman , Jeffrey Craig , Richard Albert , Anil Gupta , Jeffrey D. Stai , Karl M. J. Lofgren
CPC分类号： G11C29/765 , G06F3/0601 , G11C16/102 , G06F11/1068 , G06F2003/0694
摘要： A file structure employed in a flash electrically erasable and programmable read only memory ("EEPROM") system and aspects of forming and using certain data fields within such a file structure. An array of rows and columns of EEPROM memory cells is divided into blocks of cells that are separately addressable for the purpose of erasing an entire block of cells at the same time. Each block contains several rows of cells with certain columns thereof storing a sector of data, typically 512 bytes of data, and other columns of cells within the same rows being used as spare cells to replace any defective sector data cells and store overhead (header) information about the block and the data sector. Such overhead information includes pointers to locations of any defective sector data cells within the block, whether the block has been mapped out in favor of another block, error correction codes for the sector data and the header information, and other similar types of information.
摘要翻译： 在闪存电可擦除和可编程只读存储器（“EEPROM”）系统中采用的文件结构以及在这样的文件结构内形成和使用某些数据字段的方面。 EEPROM存储器单元的行和列的阵列被划分为可单独寻址以便同时擦除整个单元块的单元的单元块。 每个块包含几行单元，其中某些列存储数据扇区（通常为512字节的数据），同一行内的其他单元格列用作备用单元以替代任何缺陷扇区数据单元并存储开销（标题） 关于块和数据扇区的信息。 这种开销信息包括指向块内的任何缺陷扇区数据单元的位置的指针，该块是否被映射到有利于另一个块，扇区数据的纠错码和头部信息以及其他类似类型的信息。
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公开(公告)号：US08125834B2
公开(公告)日：2012-02-28
申请号：US12619581
申请日：2009-11-16
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译： 存储器系统包括固态存储器件的阵列，其经由具有极少线的器件总线与控制器模块通信并处于控制器模块的控制之下。 这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。 命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。 串行化信息伴随着一个控制信号，以帮助整理复用的组件。 阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。 通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。 使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。 通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。 读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址 寻址内存系统。
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公开(公告)号：US20100064098A1
公开(公告)日：2010-03-11
申请号：US12619581
申请日：2009-11-16
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译： 存储器系统包括固态存储器件的阵列，其经由具有极少线的器件总线与控制器模块通信并处于控制器模块的控制之下。 这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。 命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。 串行化信息伴随着一个控制信号，以帮助整理复用的组件。 阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。 通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。 使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。 通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。 读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址 寻址内存系统。
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