公开(公告)号：US20160263913A1

公开(公告)日：2016-09-15

申请号：US15018957

申请日：2016-02-09

申请人： Kazuhiro AKATSU ,  Yutaka NAGASAWA ,  Akitomo KUWABARA ,  Yuuji OHMURA ,  Hirofumi OHKUSHI ,  Hirotaka KOBAYASHI ,  Sho SAWAHATA

发明人： Kazuhiro AKATSU ,  Yutaka NAGASAWA ,  Akitomo KUWABARA ,  Yuuji OHMURA ,  Hirofumi OHKUSHI ,  Hirotaka KOBAYASHI ,  Sho SAWAHATA

IPC分类号： B41J11/00 ,  B05C17/02

CPC分类号： B41J11/0015 ,  B05C1/0813 ,  B05C1/083 ,  B05C9/04 ,  B05C9/12 ,  B05C9/14 ,  B65H23/1888 ,  B65H23/34 ,  B65H2301/3112 ,  B65H2301/5114 ,  B65H2301/51212 ,  B65H2301/517 ,  B65H2408/2171 ,  B65H2511/112 ,  B65H2511/224 ,  B65H2515/842

摘要： There is provided a process liquid coating apparatus comprising: a recording medium conveyance unit configured to convey a recording medium; a coating roller configured to rotate in accordance with the conveyed recording medium to apply process liquid on a surface of the recording medium; a pressure roller configured to cause the coating roller to apply the process liquid on the surface of the recording medium by forming an abutment part for nipping and pressing the recording medium with the coating roller; and a winding member configured to form a bent conveyance path along which the recording medium is bent with respect to a conveyance direction so that the recording medium is wound around the surface of the pressure roller, wherein the winding member is disposed adjacent to the pressure roller.

摘要翻译： 提供了一种处理液体涂覆装置，包括：记录介质传送单元，被配置为传送记录介质; 涂布辊，其构造成根据所输送的记录介质旋转，以将处理液体施加到记录介质的表面上; 压辊，其构造成使得涂布辊通过形成用于利用涂布辊夹持和压制记录介质的邻接部分将处理液体施加到记录介质的表面上; 以及卷绕构件，其构造成形成弯曲的输送路径，沿着所述弯曲输送路径，所述记录介质相对于输送方向弯曲，使得所述记录介质缠绕在所述加压辊的表面上，其中所述卷绕构件邻近所述加压辊设置 。

公开(公告)号：US20120070978A1

公开(公告)日：2012-03-22

申请号：US13303610

申请日：2011-11-23

申请人： Hirotaka KOBAYASHI

发明人： Hirotaka KOBAYASHI

IPC分类号： H01L21/768

CPC分类号： H01L21/76897 ,  H01L21/76831 ,  H01L27/10855 ,  H01L28/91

摘要： A miniaturized semiconductor device is provided by reducing the design thickness of a wiring line protecting film covering the surface of a wiring layer, and reducing the distance between the wiring layer and via plugs formed by a self-aligning process. Dummy mask layers extending in the same layout pattern as the wiring layer is formed above the wiring layer covered with a protecting film composed of a cap layer and side wall layers. In the self-aligning process for forming via plugs in a self-aligned manner with the wiring layer and its protecting film, the thickness of the cap layer is reduced and the design interval between the via plugs is reduced, whereby the miniaturization of the semiconductor device is achieved.

摘要翻译： 通过减小覆盖布线层的表面的布线保护膜的设计厚度，并且减小布线层和通过自对准工艺形成的通孔之间的距离来提供小型化半导体器件。 以与布线层相同的布局图形延伸的虚拟掩模层形成在覆盖有由盖层和侧壁层构成的保护膜的布线层的上方。 在用于以自对准方式与布线层及其保护膜形成通孔的自对准工艺中，盖层的厚度减小，并且通孔塞之间的设计间隔减小，由此半导体的小型化 设备实现。

公开(公告)号：US20090256237A1

公开(公告)日：2009-10-15

申请号：US12420307

申请日：2009-04-08

申请人： Hirotaka KOBAYASHI

发明人： Hirotaka KOBAYASHI

IPC分类号： H01L23/522 ,  H01L27/108 ,  H01L21/768

CPC分类号： H01L21/76897 ,  H01L21/76831 ,  H01L27/10855 ,  H01L28/91

摘要： A miniaturized semiconductor device is provided by reducing the design thickness of a wiring line protecting film covering the surface of a wiring layer, and reducing the distance between the wiring layer and via plugs formed by a self-aligning process. Dummy mask layers extending in the same layout pattern as the wiring layer is formed above the wiring layer covered with a protecting film composed of a cap layer and side wall layers. In the self-aligning process for forming via plugs in a self-aligned manner with the wiring layer and its protecting film, the thickness of the cap layer is reduced and the design interval between the via plugs is reduced, whereby the miniaturization of the semiconductor device is achieved.

摘要翻译： 通过减小覆盖布线层的表面的布线保护膜的设计厚度，并且减小布线层和通过自对准工艺形成的通孔之间的距离来提供小型化半导体器件。 以与布线层相同的布局图形延伸的虚拟掩模层形成在覆盖有由盖层和侧壁层构成的保护膜的布线层的上方。 在用于以自对准方式与布线层及其保护膜形成通孔的自对准工艺中，盖层的厚度减小，并且通孔塞之间的设计间隔减小，由此半导体的小型化 设备实现。

公开(公告)号：US20120315738A1

公开(公告)日：2012-12-13

申请号：US13493443

申请日：2012-06-11

申请人： Hirotaka KOBAYASHI

发明人： Hirotaka KOBAYASHI

IPC分类号： H01L21/762

CPC分类号： H01L23/481 ,  H01L21/76224 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a method of manufacturing a semiconductor device. An insulating-separating portion, which surrounds an electrode penetrating a substrate, is filled with a stacked structure of at least two stages, including a first stage of insulating film and a second stage of insulating film. When at least one of the first and second stages of insulating films has a seam, the seam is stopped by the region in the bottom of the second stage of insulating film that does not have a seam in at least the bottom thereof, thereby increasing mechanical strength. It is possible to prevent the inner region of the insulating-separating portion from being isolated.

摘要翻译： 本发明提供一种制造半导体器件的方法。 围绕穿透基板的电极的绝缘分离部分填充有包括第一级绝缘膜和第二级绝缘膜的至少两级的堆叠结构。 当绝缘膜的第一和第二阶段中的至少一个具有接缝时，接缝被第二级绝缘膜的底部至少在其底部没有接缝的区域停止，从而增加机械 强度。 可以防止绝缘分离部分的内部区域被隔离。