Biarylalkylenecarbamic acid derivatives and bacteriocides for agricultural and horticultural use
    1.
    发明授权
    Biarylalkylenecarbamic acid derivatives and bacteriocides for agricultural and horticultural use 失效
    二芳基亚烷基氨基甲酸衍生物和用于农业和园艺用途的杀菌剂

    公开(公告)号:US06620961B1

    公开(公告)日:2003-09-16

    申请号:US09485689

    申请日:2000-02-25

    IPC分类号: C07C26100

    摘要: Biarylalkylenecarbamic acid derivative represented by general formula (I): [wherein Q is a phenyl group which may be substituted or the like, X is a halogen atom, a (C1-C6) alkyl group or the like, n is 0 or an integer of from 1 to 4, R1 is a (C1-C6) alkyl group or the like, R2 is a hydrogen atom, a (C1-C6) alkyl group or the like, A is a (C1-C7) alkylene group which may be branched, and G is an oxygen atom, a sulfur atom or a group —NR— (wherein R3 is a hydrogen atom or a (C1-C4) alkyl group)] and agricultural and horticultural fungicides. The agricultural and horticultural fungicides of the present invention are useful as agricultural and horticultural fungicides because they have high preventive effects on cucumber downy mildew, apple scab, wheat powdery mildew, rice blast, cucumber gray mold and rice sheath blight without damaging crops, and are excellent in residual effectiveness and rain-resistance.

    摘要翻译: 由通式(I)表示的二芳基亚烷基氨基甲酸衍生物:[其中Q为可被取代的苯基等,X为卤素原子,(C1-C6)烷基等,n为0或整数 为1〜4,R1为(C1-C6)烷基等,R2为氢原子,(C1-C6)烷基等,A为(C1-C7)亚烷基, 是支链的,G是氧原子,硫原子或-NR-(其中R3是氢原子或(C1-C4)烷基)]和农业和园艺杀真菌剂。农业和园艺杀真菌剂 本发明对农作物和园艺杀菌剂有用,因为它们对黄瓜霜霉病,苹果痂病,小麦白粉病,稻瘟病,黄瓜灰霉病和水稻纹枯病具有很好的预防作用,没有损害作物, 抵抗性。

    Method of crystallizing silicon thin film and method of manufacturing silicon thin-film transistor device
    4.
    发明授权
    Method of crystallizing silicon thin film and method of manufacturing silicon thin-film transistor device 有权
    硅薄膜的结晶方法和硅薄膜晶体管器件的制造方法

    公开(公告)号:US09048220B2

    公开(公告)日:2015-06-02

    申请号:US13228804

    申请日:2011-09-09

    摘要: A method of crystallizing a silicon thin film, which enables uniforming the size of a crystalline grain of the silicon thin film, includes: a second process of stacking, on a substrate, a first gate electrode having a first reflectivity; a third process of stacking a second gate electrode on the first gate electrode, the second gate electrode having a second reflectivity lower than the first reflectivity and including a top face having an area smaller than an area of the top face of the first gate electrode; a fourth process of stacking a gate insulation film to cover a first region and a second region; a fifth process of stacking a noncrystalline silicon thin film on the stacked gate insulation film; and a sixth process of crystallizing the noncrystalline silicon thin film by irradiating the noncrystalline silicon thin film from above with a laser beam.

    摘要翻译: 使硅薄膜的晶粒尺寸均匀化的硅薄膜的结晶方法包括:在基板上堆叠具有第一反射率的第一栅电极的第二工序; 在所述第一栅电极上层叠第二栅电极的第三工序,所述第二栅电极具有比所述第一反射率低的第二反射率,并且包括具有小于所述第一栅电极的顶面的面积的面的顶面; 堆叠栅极绝缘膜以覆盖第一区域和第二区域的第四工艺; 堆叠栅极绝缘膜上的非晶硅薄膜的第五工序; 以及通过用激光束从上方照射非晶硅薄膜来使非晶硅薄膜结晶的第六工序。

    DISPLAY DEVICE, THIN-FILM TRANSISTOR USED FOR DISPLAY DEVICE, AND METHOD OF MANUFACTURING THIN-FILM TRANSISTORS
    5.
    发明申请
    DISPLAY DEVICE, THIN-FILM TRANSISTOR USED FOR DISPLAY DEVICE, AND METHOD OF MANUFACTURING THIN-FILM TRANSISTORS 审中-公开
    显示装置,用于显示装置的薄膜晶体管,以及制造薄膜晶体管的方法

    公开(公告)号:US20130001572A1

    公开(公告)日:2013-01-03

    申请号:US13616673

    申请日:2012-09-14

    IPC分类号: H01L27/15 H01L21/336

    摘要: A thin-film transistor used for a display device includes a gate electrode formed on an insulating substrate; a gate insulating film formed on the substrate so as to cover the gate electrode; a semiconductor layer composed of first semiconductor layer and second semiconductor layer formed on the gate insulating film; an ohmic contact layer formed on the semiconductor layer; and a source electrode and a drain electrode formed on the ohmic contact layer so as to be spaced from each other. The transistor further includes an etching stopper made of spin-on glass (SOG) on a channel-forming region of the semiconductor layer.

    摘要翻译: 用于显示装置的薄膜晶体管包括形成在绝缘基板上的栅电极; 栅极绝缘膜,形成在所述基板上以覆盖所述栅电极; 由形成在所述栅极绝缘膜上的第一半导体层和第二半导体层构成的半导体层; 形成在半导体层上的欧姆接触层; 以及形成在欧姆接触层上以彼此间隔开的源电极和漏电极。 晶体管还包括在半导体层的沟道形成区上由旋涂玻璃(SOG)制成的蚀刻停止层。

    Field effect transistor
    6.
    发明授权
    Field effect transistor 有权
    场效应晶体管

    公开(公告)号:US08106382B2

    公开(公告)日:2012-01-31

    申请号:US12305824

    申请日:2007-06-18

    IPC分类号: H01L29/66

    摘要: A source electrode 105 which is connected to a portion of at least one semiconductor nanostructure 103 among a plurality of semiconductor nanostructures, a drain electrode 106 connected to another portion of the semiconductor nanostructure 103, and a gate electrode 102 capable of controlling electrical conduction of the semiconductor nanostructure 103 are included. The semiconductor nanostructures 103 include a low concentration region 108 having a relatively low doping concentration and a pair of high concentration regions 107 having a higher doping concentration than that of the low concentration region 108 and being connected to both ends of the low concentration region 108. The doping concentration of the high concentration regions 107 is 1×1019 cm−3 or more; the length of the low concentration region 108 is shorter than a length of the gate electrode 102 along a direction from the source electrode 105 to the drain electrode 106; and the length of the gate electrode 102 is shorter than the interspace between the source electrode 105 and the drain electrode 106.

    摘要翻译: 连接到多个半导体纳米结构中的至少一个半导体纳米结构103的一部分的源电极105,连接到半导体纳米结构103的另一部分的漏电极106和能够控制半导体纳米结构103的导电的栅电极102 包括半导体纳米结构103。 半导体纳米结构103包括具有相对低的掺杂浓度的低浓度区域108和具有比低浓度区域108的掺杂浓度更高的掺杂浓度的一对高浓度区域107并且连接到低浓度区域108的两端。 高浓度区域107的掺杂浓度为1×1019cm-3以上; 低浓度区域108的长度比沿源极电极105至漏电极106的方向的栅电极102的长度短; 并且栅电极102的长度比源电极105和漏电极106之间的间隙短。

    VARIABLE GAIN AMPLIFIER CIRCUIT
    7.
    发明申请
    VARIABLE GAIN AMPLIFIER CIRCUIT 有权
    可变增益放大器电路

    公开(公告)号:US20110260789A1

    公开(公告)日:2011-10-27

    申请号:US12909763

    申请日:2010-10-21

    IPC分类号: H03F1/34

    摘要: A variable gain amplifier circuit includes: an operational amplifier having a non-inverting input terminal applied with a predetermined voltage; a feedback resistor having one end connected to an inverting input terminal of the operational amplifier and the other end connected to an output terminal of the operational amplifier; and a variable resistor having one end applied with an input voltage and the other end connected to the inverting input terminal of the operational amplifier.

    摘要翻译: 可变增益放大器电路包括:具有施加预定电压的非反相输入端的运算放大器; 反馈电阻器,其一端连接到运算放大器的反相输入端子,另一端连接到运算放大器的输出端子; 以及可变电阻器,其一端施加有输入电压,另一端连接到运算放大器的反相输入端。

    DC-DC CONVERTER WITH SNUBBER CIRCUIT
    8.
    发明申请
    DC-DC CONVERTER WITH SNUBBER CIRCUIT 有权
    带有SNUBER电路的DC-DC转换器

    公开(公告)号:US20110090716A1

    公开(公告)日:2011-04-21

    申请号:US12999932

    申请日:2009-06-15

    IPC分类号: H02M3/335

    摘要: In order to achieve an object to reduce a surge voltage and suppress noise generation, the present invention provides a DC-DC converter with a snubber circuit, which boosts a voltage Vi of a DC power supply. The snubber circuit includes: a series circuit connected to both ends of a smoothing capacitor Co and including a snubber capacitor Cs and a snubber resistor Rs; a snubber diode Ds1 connected to a node at which the snubber capacitor Cs and the snubber resistor Rs are connected, and to a node at which a reactor Lr1 and an additional winding 1b of a transformer T1 are connected; and a snubber diode Ds2 connected to the node at which the snubber capacitor Cs and the snubber resistor Rs are connected, and to a node at which a reactor Lr2 and an additional winding 2b of a transformer T2 are connected.

    摘要翻译: 为了实现降低浪涌电压并抑制噪声产生的目的,本发明提供一种具有缓冲电路的DC-DC转换器,其提高DC电源的电压Vi。 缓冲电路包括:连接到平滑电容器Co的两端并包括缓冲电容器Cs和缓冲电阻器Rs的串联电路; 连接到缓冲电容器Cs和缓冲电阻器Rs连接的节点的缓冲二极管Ds1以及与变压器T1的电抗器Lr1和附加绕组1b连接的节点; 以及连接到缓冲电容器Cs和缓冲电阻器Rs所连接的节点的缓冲二极管Ds2以及与变压器T2的电抗器Lr2和附加绕组2b连接的节点。

    Heterojunction biploar transistor and method for manufacturing same
    10.
    发明授权
    Heterojunction biploar transistor and method for manufacturing same 失效
    异质结双极晶体管及其制造方法

    公开(公告)号:US07719031B2

    公开(公告)日:2010-05-18

    申请号:US10564085

    申请日:2004-07-06

    IPC分类号: H01L29/74

    CPC分类号: H01L29/66242 H01L29/7378

    摘要: A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed on the silicon buffer layer and comprises silicon and at least germanium and where a composition ratio of the germanium to the silicon varies in a thickness direction of the composition-ratio graded base layer 111. The extrinsic base region 12 comprises an extrinsic base formation layer 113 comprised of silicon which is formed on the substrate and adjacent to the silicon buffer layer. And the thickness of the extrinsic base formation layer 113 is not less than 40 nm.

    摘要翻译: 双极晶体管120包括衬底1,本征基极区域11和非本征基极区域12.本征基极区域11包括由衬底1上形成的硅构成的硅缓冲层109和组成比分级基底 层111,其形成在硅缓冲层上并且包含硅并且至少为锗,并且其中锗与硅的组成比在组成比梯度基底层111的厚度方向上变化。外部基极区12包括 外部基底形成层113由硅构成,其形成在衬底上并与硅缓冲层相邻。 外部基底形成层113的厚度不小于40nm。