公开(公告)号：US4920546A

公开(公告)日：1990-04-24

申请号：US176294

申请日：1988-03-31

申请人： Kazuo Iguchi ,  Tetsuo Soejima ,  Kazuo Murano ,  Shigeo Amemiya ,  Hiroaki Komine ,  Toshiaki Watanabe ,  Tomohiro Shinomiya

发明人： Kazuo Iguchi ,  Tetsuo Soejima ,  Kazuo Murano ,  Shigeo Amemiya ,  Hiroaki Komine ,  Toshiaki Watanabe ,  Tomohiro Shinomiya

IPC分类号： H04J3/06

CPC分类号： H04J3/0605

摘要： Disclosed is a frame synchronizing apparatus in a receiving equipment for receiving digital signals for PCM communication. The digital signals consists serial signals at a rate of f.sub.0 (bps). The serial signals include a frame synchronizing signal consituting n bits or a part of the frame synchronizing signal, collectively arranged in one frame. To attain a high-speed operation and a shorter synchronization establishing time, the apparatus comprises a latching circuit for converting the serial signals into parallel signals and for latching the parallel signals, and a circuit for detecting a plural number of times of synchronization during the n bit interval in one frame.

公开(公告)号：US4924461A

公开(公告)日：1990-05-08

申请号：US286872

申请日：1988-12-20

申请人： Shigeo Amemiya ,  Hiroaki Komine ,  Tomohiro Shinomiya ,  Kazuo Iguchi ,  Tetsuo Soejima

发明人： Shigeo Amemiya ,  Hiroaki Komine ,  Tomohiro Shinomiya ,  Kazuo Iguchi ,  Tetsuo Soejima

IPC分类号： H04L12/403

CPC分类号： H04L12/403

摘要： In a sequential polling type communication network system including a master station, a first channel, a second channel, and at least two slave stations, the master station includes request registration units for registering data transmission requests from slave stations during a data transmission by another slave station, and an interrupt polling unit for polling the slave station which has issued the data transmission request after completion of the data transmission or completion of a polling of a slave station, and the slave station includes a unit for responding to a polling during the data transmission, and transitting a data transmission request when data to be transmitted exists, and for responding to the interrupt polling from the master station, and transmitting the data to the master station until the data transmission is completed.

公开(公告)号：US5132680A

公开(公告)日：1992-07-21

申请号：US447432

申请日：1989-12-07

申请人： Koji Tezuka ,  Tomohiro Shinomiya ,  Shigeo Amemiya ,  Kazuo Iguchi ,  Tetsuo Soejima

发明人： Koji Tezuka ,  Tomohiro Shinomiya ,  Shigeo Amemiya ,  Kazuo Iguchi ,  Tetsuo Soejima

IPC分类号： H04L12/403

CPC分类号： H04L12/403

摘要： A communication system including a master station, a plurality of slave stations each for communicating with the master station, a two-way transmission line connecting the master station and the plurality of slave stations. Each of the slave stations sends a request for further communication with the master station, to the master station when its own slave station is allowed to communicate with the master station and its own slave station has the above request. The master station detects the request for further communication with the master station in a signal sent from a slave station, and memorizes the slave station from which the request for further communication with the master station is detected, until an allowance signal is sent to the slave station from the master station corresponding to the memorizing of the slave station. The master station has a cyclic address pointer which points to an address of a next one of the slave stations in a cyclic order when no slave station is memorized in the master station. The master station outputs the allowance signal to communicate with the master station to a slave station which is memorized in the master station or to a slave station the address of which is pointed to by the cyclic address pointer when no request is memorized in the master station.

公开(公告)号：US5166675A

公开(公告)日：1992-11-24

申请号：US726637

申请日：1991-07-02

申请人： Shigeo Amemiya ,  Koji Tezuka ,  Tomohiro Shinomiya ,  Hiroshi Takeo ,  Tetsuo Soejima ,  Kazuo Iguchi

发明人： Shigeo Amemiya ,  Koji Tezuka ,  Tomohiro Shinomiya ,  Hiroshi Takeo ,  Tetsuo Soejima ,  Kazuo Iguchi

IPC分类号： H04L12/403

CPC分类号： H04L12/40143 ,  H04L12/403

摘要： A communication system containing a master station and a plurality of slave stations. The master station receives a request from one of the plurality of slave stations and memorizes one or more requests from one or more slave stations. The master station also sends a request sending allowance signal which addresses one of the plurality of slave stations to give an allowance to send a request for sending data, and sends a data sending allowance signal which addresses one of the plurality of slave stations to give an allowance to send data, according to a request which is memorized. Each of the slave stations detects a request sending allowance signal which addresses its own slave station, and a data sending allowance signal which addresses its own slave station. Each of the slave stations also sends a request for sending data to the master station when its own slave station detects a request sending allowance signal which addresses its own slave station. In addition, each slave station sends data to the master station when its own slave station detects a data sending allowance signal which addresses its own slave station.

摘要翻译： 一种包含主站和多个从站的通信系统。 主站接收来自多个从站中的一个的请求，并存储来自一个或多个从站的一个或多个请求。 主站还发送请求发送允许信号，该请求发送允许信号寻址多个从站中的一个从站给发送请求发送数据的余地，并且发送寻址多个从站中的一个从站的数据发送允许信号，以给出 根据要记录的要求发送数据。 每个从站检测到寻址其自己的从站的请求发送允许信号，以及寻址其自己的从站的数据发送允许信号。 当其自己的从站检测到寻址其自己的从站的请求发送允许信号时，每个从站还发送向主站发送数据的请求。 另外，每个从站在其自己的从站检测到寻址其自己的从站的数据发送允许信号时，向主站发送数据。

公开(公告)号：US5086436A

公开(公告)日：1992-02-04

申请号：US529326

申请日：1990-05-29

申请人： Koji Tezuka ,  Shigeo Amemiya ,  Tomohiro Shinomiya ,  Kazuo Iguchi ,  Tetsuo Soejima

发明人： Koji Tezuka ,  Shigeo Amemiya ,  Tomohiro Shinomiya ,  Kazuo Iguchi ,  Tetsuo Soejima

IPC分类号： H04L25/38 ,  H03M7/30 ,  H04L7/04 ,  H04L25/49

CPC分类号： H04L25/491 ,  H03M7/30

摘要： A coded transmission system wherein each bit of transmitted data having a logical value is coded depending on a coded result of a preceding bit. The coded transmission system contains a sender-side apparatus, a transmission line, and a receiver-side apparatus. In the sender-side apparatus, a resetting bit and a message are generated; a code of a bit last transmitted which is necessary to code a bit which is to be transmitted next is memorized in a first preceding code memorizing circuit; and the content of the first preceding code memorizing circuit is reset to an initial code responding to the resetting bit. A coding circuit receives the resetting bit and the message, codes each bit of the message in accordance with a predetermined coding rule and the content of the first preceding code memorizing circuit, and codes the resetting bit to a predetermined resetting code which is different from the codes used in the coding of the message. In the receiver-side apparatus, a code of a bit last received which is necessary to decode a code of a bit which is received next is memorized in a second preceding code memorizing circuit. A resetting circuit resets a content of a second preceding code memorizing circuit to a predetermined initial code when receiving the resetting code. A decoding circuit decodes the received codes corresponding to the message in accordance with the predetermined coding rule and the content of the second preceding code memorizing circuit.

公开(公告)号：US5475383A

公开(公告)日：1995-12-12

申请号：US849670

申请日：1992-03-11

申请人： Shinji Ohta ,  Tomohiro Shinomiya ,  Hiroshi Takeo ,  Misao Fukuda ,  Kazuo Iguchi

发明人： Shinji Ohta ,  Tomohiro Shinomiya ,  Hiroshi Takeo ,  Misao Fukuda ,  Kazuo Iguchi

IPC分类号： H04Q3/52 ,  H04L12/931 ,  H04Q1/00

CPC分类号： H04L12/5601 ,  H04L49/108 ,  H04L49/1576 ,  H04L49/255 ,  H04L2012/5681

摘要： A cross-point type switch includes a plurality of basic elements arranged in rows and columns so as to form a matrix arrangement of the basic elements. Each of the basic elements includes a plurality of input ports, output ports, expanded input ports and expanded output ports. A write/read part is connected to a common memory and has the function of writing data into the common memory and reading out the data from the common memory. A selector part selectively outputs either the data read out from the common memory or data from the expanded input ports to the output ports. The expanded output ports are directly connected to the input ports.

摘要翻译： 交叉点型开关包括以行和列布置的多个基本元件，以形成基本元件的矩阵排列。 每个基本元件包括多个输入端口，输出端口，扩展输入端口和扩展输出端口。 写/读部分连接到公共存储器，并且具有将数据写入公共存储器并从公共存储器读出数据的功能。 选择器部分选择性地将从公共存储器读出的数据或从扩展的输入端口的数据输出到输出端口。 扩展的输出端口直接连接到输入端口。

公开(公告)号：US07269129B2

公开(公告)日：2007-09-11

申请号：US09901197

申请日：2001-07-09

申请人： Akihiro Yasuo ,  Shigeatsu Samukawa ,  Junichi Tamura ,  Nobuyuki Umeda ,  Hiroyuki Sato ,  Tomohiro Shinomiya ,  Jun Tanaka

发明人： Akihiro Yasuo ,  Shigeatsu Samukawa ,  Junichi Tamura ,  Nobuyuki Umeda ,  Hiroyuki Sato ,  Tomohiro Shinomiya ,  Jun Tanaka

IPC分类号： G01R31/08

CPC分类号： H04J3/085 ,  H04J2203/0042 ,  H04J2203/006 ,  H04L12/437

摘要： Disclosed is a ring network in which a plurality of transmitting apparatuses are connected in ring form so as to be capable of transmitting in each of upstream and downstream directions, working and protection channels are assigned to each direction and, when failure occurs in a transmission path, a transmit signal is looped back using the protection channel to effect rescue. The ring network includes an insert transmitting apparatus that incorporates a packet, which enters from a lower-order side, into a higher-order signal and transmits the signal to a transmission path, and a drop transmitting apparatus that extracts the packet from the higher-order signal and transmits the packet to another lower-order side. Monitoring is performed to determine whether communication between the insert and drop transmitting apparatus has become unrescuable owing to transmission-path failure. When communication has become unrescuable, the insert transmitting apparatus halts the transmission of the packet to the transmission path.

摘要翻译： 公开了一种环形网络，其中多个发送装置以环形方式连接，以便能够在上游和下游方向中的每一个方向上发送，工作和保护信道被分配给每个方向，并且当在传输路径中发生故障时 ，使用保护通道循环发送信号以实现救援。 该环形网络包括：插入发送装置，其将从低级侧进入的分组并入高阶信号，并将该信号发送到传输路径;以及分组发送装置， 并将数据包发送到另一个低阶侧。 执行监视以确定插入和丢弃发送设备之间的通信是否由于传输路径故障而变得不可理解。 当通信变得不可理解时，插入发送装置将分组的传输停止到传输路径。

公开(公告)号：US06791984B2

公开(公告)日：2004-09-14

申请号：US09748671

申请日：2000-12-26

申请人： Nagao Shimada ,  Tomohiro Shinomiya ,  Masatake Miyabe ,  Haruo Yamashita

发明人： Nagao Shimada ,  Tomohiro Shinomiya ,  Masatake Miyabe ,  Haruo Yamashita

IPC分类号： H04L1216

CPC分类号： H04Q11/0478 ,  H04L2012/5605 ,  H04L2012/561 ,  H04L2012/5632

摘要： A subscriber-line-terminating apparatus for dynamically allocating band portions to a plurality of terminal apparatuses includes an in-buffer-information-amount receiving unit for receiving an in-buffer-information amount from each of the terminal apparatuses; an insufficient-band-computing unit for computing an insufficient band portion required by each of the terminal apparatuses; an in-buffer-information-amount-proportional-band-allocating unit for allocating a band portion corresponding to the in-buffer-information amount to each of the terminal apparatuses and a past-use-band-allocating unit for allocating a past-use band part to each of the terminal apparatuses as a past-use band portion based on a first past-use band variable of the terminal apparatus.

摘要翻译： 用于向多个终端装置动态分配频带部分的用户线路终端装置包括：缓冲区内信息量接收单元，用于从每个终端装置接收缓冲区内信息量; 用于计算每个终端装置所需的不足带部分的不足带计算单元; 缓冲器内信息量比例带分配单元，用于向每个终端装置分配对应于缓冲器内信息量的频带部分;以及过去使用频带分配单元，用于分配过去 - 基于终端装置的第一过去使用频带变量，将每个终端装置的频带部分用作过去使用频带部分。

公开(公告)号：US06658009B1

公开(公告)日：2003-12-02

申请号：US09460917

申请日：1999-12-14

申请人： Haruo Yamashita ,  Masatake Miyabe ,  Tomohiro Shinomiya ,  Kazuyuki Tajima ,  Masamichi Kasa

发明人： Haruo Yamashita ,  Masatake Miyabe ,  Tomohiro Shinomiya ,  Kazuyuki Tajima ,  Masamichi Kasa

IPC分类号： H04L1256

CPC分类号： H04Q11/0066 ,  H04Q11/04 ,  H04Q2011/0064 ,  H04Q2011/0094 ,  H04Q2213/1301 ,  H04Q2213/13103 ,  H04Q2213/13174 ,  H04Q2213/13176 ,  H04Q2213/13204 ,  H04Q2213/13251 ,  H04Q2213/13349

摘要： In a system where a plurality of terminal units are connected to a network unit via an optical transmission line and packets are transmitted in units of cells according to polling information, polling request information including the number of variable-length packets stored in the buffer of each of the terminal unit, the number of cells composing each variable-length packet and the number of remaining cells of a packet being read is created, polling information corresponding to a time slot allocated according to the polling request information is transmitted from the shared band control unit of the network unit, and bands are allocated to the plurality of terminal units.

摘要翻译： 在多个终端单元通过光传输线路连接到网络单元并且根据轮询信息以小区为单位发送分组的系统中，轮询请求信息包括存储在每个缓冲器中的可变长度分组的数量 ，构成每个可变长度分组的单元数目和正在读取的分组的剩余单元数，从共享频带控制中发送与根据轮询请求信息分配的时隙相对应的轮询信息 单元，并且将频带分配给多个终端单元。

公开(公告)号：US08264399B2

公开(公告)日：2012-09-11

申请号：US12872718

申请日：2010-08-31

申请人： Tomohiro Shinomiya ,  Yasuhiro Kurono

发明人： Tomohiro Shinomiya ,  Yasuhiro Kurono

IPC分类号： G01S13/00

CPC分类号： G01S3/74 ,  G01S13/003 ,  H01Q21/22

摘要： In a radar device including: a transmission antenna group having a plurality of transmission antennas; a reception antenna group having a plurality of reception antennas; and transmission switchover means to transmit transmission waves in a way that sequentially switches over the transmission antennas of the transmission antenna group, the reception antenna group receiving reflected waves, reflected from a target, of transmission waves of the transmission antennas when sequentially transmitting the transmission waves, is made to function as a virtual sub-array corresponding to the transmission antennas. The target is thus detected by executing a space averaging process based on a relative position, to the reception antenna group, of each of the transmission antennas undergoing the transmission switchover with respect to the virtual correlation values corresponding to the plurality of virtual sub-arrays.

摘要翻译： 一种雷达装置，包括：具有多个发送天线的发送天线组; 具有多个接收天线的接收天线组; 以及传输切换装置，用于在顺序地发送发射波时以顺序地切换发射天线组的发射天线的方式发送传输波，接收天线组接收从目标反射的反射波的发射天线的发射波 作为与发送天线对应的虚拟子阵列。 因此，通过对与多个虚拟子阵列对应的虚拟相关值进行发送切换的各发送天线中的每个发送天线，基于相对位置对接收天线组执行空间平均处理来检测目标。