公开(公告)号：US20050061659A1

公开(公告)日：2005-03-24

申请号：US10886716

申请日：2004-07-09

申请人： Keiichi Kurashina ,  Mizuki Nagai ,  Satoru Yamamoto ,  Hiroyuki Kanda ,  Koji Mishima ,  Brett Baker ,  Keith Kwietniak ,  Hariklia Deligianni ,  Panos Andricacos

发明人： Keiichi Kurashina ,  Mizuki Nagai ,  Satoru Yamamoto ,  Hiroyuki Kanda ,  Koji Mishima ,  Brett Baker ,  Keith Kwietniak ,  Hariklia Deligianni ,  Panos Andricacos

IPC分类号： C25D7/12 ,  C25D5/06 ,  C25D5/08 ,  C25D5/18 ,  C25D5/22 ,  C25D17/00 ,  C25D17/14 ,  C25D21/00 ,  C25D21/12 ,  H01L21/00 ,  H01L21/02 ,  H01L21/288 ,  H01L21/677 ,  H01L21/768

CPC分类号： H01L21/288 ,  C25D5/06 ,  C25D5/08 ,  C25D7/123 ,  C25D17/001 ,  H01L21/02068 ,  H01L21/02074 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/2885 ,  H01L21/67028 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/6723 ,  H01L21/67751 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/76877

摘要： A plating apparatus is used for filling a fine interconnect pattern formed in a substrate with metal to form interconnects. The plating apparatus includes a cathode unit having a seal member for hermetically sealing a peripheral portion of a surface, to be plated, of the substrate and a cathode electrode which is brought into contact with the substrate to supply current to the substrate; an electrode head disposed so as to be movable toward and away from the surface to be plated and having an anode and a porous member with water retentivity at upper and lower parts of the electrode head; a pressing mechanism for pressing the porous member against the surface, to be plated, of the substrate under a desired pressure; and a driving mechanism for making a relative motion between the porous member and the substrate while the porous member and the surface, to be plated, of the substrate are brought into contact with each other.

摘要翻译： 电镀装置用于用金属填充形成在衬底中的精细互连图案以形成互连。 电镀装置包括：阴极单元，具有密封部件，用于密封要被电镀的基板的周边部分和与基板接触的阴极电极，以向基板提供电流; 电极头，其设置成能够朝向和远离待镀表面移动，并且在电极头的上部和下部具有阳极和具有保水性的多孔构件; 用于在所需压力下将所述多孔构件按压在所述基板的要被电镀的表面上的按压机构; 以及用于在多孔构件和被电镀的表面彼此接触的同时在多孔构件和基底之间进行相对运动的驱动机构。

公开(公告)号：US20050241946A1

公开(公告)日：2005-11-03

申请号：US11016924

申请日：2004-12-21

申请人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Ryoichi Kimizuka ,  Hariklia Deligianni ,  Brett Baker ,  Keith Kwietniak ,  Panayotis Andricacos ,  Philippe Vereecken

发明人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Ryoichi Kimizuka ,  Hariklia Deligianni ,  Brett Baker ,  Keith Kwietniak ,  Panayotis Andricacos ,  Philippe Vereecken

IPC分类号： C25D3/38 ,  C25D5/00 ,  C25D5/02 ,  C25D5/08 ,  C25D5/18 ,  C25D7/12 ,  C25D17/00 ,  H01L21/288 ,  H01L21/768

CPC分类号： C25D3/38 ,  C25D5/02 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  C25D17/007 ,  C25D17/008 ,  H01L21/2885 ,  H01L21/76877

摘要： A plating method is capable of mechanically and electrochemically preferentially depositing a plated film in fine interconnect recesses such as trenches and via holes, and depositing the plated film to a flatter surface. The plating method including: disposing a substrate having fine interconnect recesses such that a conductive layer faces an anode; disposing a porous member between the substrate and the anode; filling a plating solution between the substrate and the anode; and repeating a process of holding the conductive layer and the porous member in contact with each other and moving the conductive layer and the porous member relatively to each other, a process of passing an electric current between the conductive layer and the anode while keeping the conductive layer still with respect to the porous member, and a process of stopping the supply of the electric current between the conductive layer and the anode.

摘要翻译： 电镀方法能够机械地和电化学地优先在诸如沟槽和通孔的精细互连凹槽中沉积镀膜，并将镀膜沉积到更平坦的表面上。 电镀方法包括：设置具有导电层面向阳极的细微互连凹槽的衬底; 在基板和阳极之间设置多孔构件; 在基板和阳极之间填充电镀液; 并且重复保持导电层和多孔构件彼此接触并相对于彼此移动导电层和多孔构件的过程，使导电层和阳极之间的电流通过，同时保持导电 相对于多孔构件的静止层，以及停止在导电层和阳极之间的电流的供给的处理。

公开(公告)号：US07479213B2

公开(公告)日：2009-01-20

申请号：US11020068

申请日：2004-12-23

申请人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Hidenao Suzuki ,  Koji Mishima ,  Brett C. Baker-O'Neal ,  Hariklia Deligianni ,  Keith Kwietniak

发明人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Hidenao Suzuki ,  Koji Mishima ,  Brett C. Baker-O'Neal ,  Hariklia Deligianni ,  Keith Kwietniak

IPC分类号： C25D5/10

CPC分类号： C25D17/001 ,  C25D5/10 ,  C25D5/18 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/7684 ,  H01L21/76877

摘要： A plating method is capable of preferentially precipitating a plated film fully and uniformly in trenches and via holes according to a mechanical and electrochemical process, and of easily forming a plated film having higher flatness surface without being affected by variations in the shape of trenches and via holes. The plating method includes a first plating process and a second plating process. The second plating process is performed by filling a plating solution between an anode and a substrate, with a porous member placed in the plating solution, repeatedly bringing the porous member and the substrate into and out of contact with each other, passing a current between the anode and the substrate while the porous member is being held in contact with the substrate.

摘要翻译： 电镀方法能够根据机械和电化学方法优先将电镀膜完全均匀地沉积在沟槽和通孔中，并且容易地形成具有较高平坦度表面的电镀膜，而不受沟槽形状和通孔形状的变化的影响 孔。 电镀方法包括第一电镀工艺和第二电镀工艺。 通过在阳极和基板之间填充电镀液，将多孔构件放置在电镀液中，反复使多孔构件和基板彼此接触和脱离接触来进行第二电镀工艺，使电流在 阳极和衬底，同时多孔构件被保持与衬底接触。

公开(公告)号：US07553400B2

公开(公告)日：2009-06-30

申请号：US11016924

申请日：2004-12-21

申请人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Ryoichi Kimizuka ,  Hariklia Deligianni ,  Brett Baker ,  Keith Kwietniak ,  Panayotis Andricacos ,  Phillipe Vereecken

发明人： Mizuki Nagai ,  Hiroyuki Kanda ,  Keiichi Kurashina ,  Satoru Yamamoto ,  Ryoichi Kimizuka ,  Hariklia Deligianni ,  Brett Baker ,  Keith Kwietniak ,  Panayotis Andricacos ,  Phillipe Vereecken

IPC分类号： C25D5/22

CPC分类号： C25D3/38 ,  C25D5/02 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  C25D17/007 ,  C25D17/008 ,  H01L21/2885 ,  H01L21/76877

摘要： A plating method is capable of mechanically and electrochemically preferentially depositing a plated film in fine interconnect recesses such as trenches and via holes, and depositing the plated film to a flatter surface. The plating method including: disposing a substrate having fine interconnect recesses such that a conductive layer faces an anode; disposing a porous member between the substrate and the anode; filling a plating solution between the substrate and the anode; and repeating a process of holding the conductive layer and the porous member in contact with each other and moving the conductive layer and the porous member relatively to each other, a process of passing an electric current between the conductive layer and the anode while keeping the conductive layer still with respect to the porous member, and a process of stopping the supply of the electric current between the conductive layer and the anode.

摘要翻译： 电镀方法能够机械地和电化学地优先在诸如沟槽和通孔的精细互连凹槽中沉积镀膜，并将镀膜沉积到更平坦的表面上。 电镀方法包括：设置具有导电层面向阳极的细微互连凹槽的衬底; 在基板和阳极之间设置多孔构件; 在基板和阳极之间填充电镀液; 并且重复保持导电层和多孔构件彼此接触并相对于彼此移动导电层和多孔构件的过程，使导电层和阳极之间的电流通过，同时保持导电 相对于多孔构件的静止层，以及停止在导电层和阳极之间的电流的供给的处理。

公开(公告)号：US20070034526A1

公开(公告)日：2007-02-15

申请号：US11202684

申请日：2005-08-12

申请人： Natsuki Makino ,  Junji Kunisawa ,  Keisuke Namiki ,  Yukio Fukunaga ,  Katsuyuki Musaka ,  Ray Fang ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Keith Kwietniak ,  Brett Baker-O'Neal ,  Matteo Flotta ,  Philippe Vereecken

发明人： Natsuki Makino ,  Junji Kunisawa ,  Keisuke Namiki ,  Yukio Fukunaga ,  Katsuyuki Musaka ,  Ray Fang ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Keith Kwietniak ,  Brett Baker-O'Neal ,  Matteo Flotta ,  Philippe Vereecken

IPC分类号： B23H3/00

CPC分类号： B23H5/08 ,  C25F3/02 ,  C25F7/00

摘要： An electrolytic processing apparatus can planarize uniformly over an entire surface of a substrate under a low pressure without any damages to the substrate. The electrolytic processing apparatus has a substrate holder configured to hold and rotate a substrate having a metal film formed on a surface of the substrate and an electrolytic processing unit configured to perform an electrolytic process on the substrate held by the substrate holder. The electrolytic processing unit has a rotatable processing electrode, a polishing pad attached to the rotatable processing electrode, and a pressing mechanism configured to press the polishing pad against the substrate. The electrolytic processing unit also has a liquid supply mechanism configured to supply an electrolytic processing liquid between the substrate and the rotatable processing electrode, a relative movement mechanism operable to move the substrate and the rotatable processing electrode relative to each other, and a power supply configured to applying a voltage between the rotatable processing electrode and the metal film of the substrate so that the rotatable processing electrode serves as a cathode and the metal film of the substrate serves as an anode.

摘要翻译： 电解处理装置可以在低压下在基板的整个表面上均匀地平坦化，而不会对基板造成任何损坏。 所述电解处理装置具有基板保持件，所述基板保持器被构造成保持和旋转形成在所述基板的表面上的金属膜的基板和被配置为在由所述基板保持器保持的所述基板上进行电解处理的电解处理单元。 电解处理单元具有可旋转的处理电极，附接到可旋转处理电极的抛光垫，以及被配置为将抛光垫压靠在基板上的按压机构。 电解处理单元还具有：液体供给机构，被构造成在基板和可旋转处理电极之间提供电解处理液体;相对移动机构，其可操作以相对于彼此移动基板和可旋转处理电极;电源配置 在可旋转处理电极和基板的金属膜之间施加电压，使得可旋转处理电极用作阴极，并且基板的金属膜用作阳极。

公开(公告)号：US20090095634A1

公开(公告)日：2009-04-16

申请号：US11907589

申请日：2007-10-15

申请人： Natsuki Makino ,  Keisuke Namiki ,  Kunihito Ide ,  Junji Kunisawa ,  Katsuyuki Musaka ,  Philippe Vereecken ,  Brett C. Baker-O'Neal ,  Hariklia Deligianni ,  Keith Kwietniak

发明人： Natsuki Makino ,  Keisuke Namiki ,  Kunihito Ide ,  Junji Kunisawa ,  Katsuyuki Musaka ,  Philippe Vereecken ,  Brett C. Baker-O'Neal ,  Hariklia Deligianni ,  Keith Kwietniak

IPC分类号： C25D5/48 ,  C25D5/00

CPC分类号： C25D17/00 ,  C25D17/008 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76877

摘要： A plating method can form a plated film having a uniform thickness over the entire surface, including the peripheral surface, of a substrate. The plating method includes: disposing an anode so as to face a conductive film, formed on a substrate, which serves as a cathode, and disposing an auxiliary cathode on an ring-shaped seal member for sealing a peripheral portion of the substrate; bringing the conductive film, the anode and the auxiliary cathode into contact with a plating solution; and supplying electric currents between the anode and the conductive film, and between the anode and the auxiliary cathode to carry out plating.

摘要翻译： 电镀方法可以在基板的整个表面（包括外周表面）上形成均匀厚度的镀膜。 电镀方法包括：将阳极设置成面对形成在用作阴极的基板上的导电膜，并将辅助阴极设置在用于密封基板的周边部分的环形密封构件上; 使导电膜，阳极和辅助阴极与电镀液接触; 并且在阳极和导电膜之间以及阳极和辅助阴极之间提供电流以进行电镀。

公开(公告)号：US20050199502A1

公开(公告)日：2005-09-15

申请号：US11123117

申请日：2005-05-06

申请人： Panayotis Andricacos ,  Hariklia Deligianni ,  Wilma Horkans ,  Keith Kwietniak ,  Michael Lane ,  Sandra Malhotra ,  Fenton McFeely ,  Conal Murray ,  Kenneth Rodbell ,  Philippe Vereecken

发明人： Panayotis Andricacos ,  Hariklia Deligianni ,  Wilma Horkans ,  Keith Kwietniak ,  Michael Lane ,  Sandra Malhotra ,  Fenton McFeely ,  Conal Murray ,  Kenneth Rodbell ,  Philippe Vereecken

IPC分类号： C25D5/18 ,  C25D7/12 ,  C25D5/02

CPC分类号： C25D5/18 ,  C25D7/12 ,  Y10S428/926 ,  Y10T428/12493 ,  Y10T428/12528 ,  Y10T428/12771 ,  Y10T428/12778 ,  Y10T428/12903

摘要： A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.

摘要翻译： 导电材料电镀在可镀敷的电阻金属阻挡层上，该层使用任选地包含超填充添加剂和抑制剂的电镀槽，并且通过改变作为电镀金属面积的函数的电流或电压。 还提供了一种结构，其包括衬底，位于衬底上的可镀金属阻挡层和位于可镀电阻金属阻挡层上的导电材料的相对连续的均匀电镀层。

公开(公告)号：US20050006242A1

公开(公告)日：2005-01-13

申请号：US10615794

申请日：2003-07-10

申请人： Panayotis Andricacos ,  Dean Chung ,  Hariklia Deligianni ,  James Fluegel ,  Keith Kwietniak ,  Peter Locke ,  Darryl Restaino ,  Soon-Cheon Seo ,  Philippe Vereecken ,  Erick Walton

发明人： Panayotis Andricacos ,  Dean Chung ,  Hariklia Deligianni ,  James Fluegel ,  Keith Kwietniak ,  Peter Locke ,  Darryl Restaino ,  Soon-Cheon Seo ,  Philippe Vereecken ,  Erick Walton

IPC分类号： C23C18/16 ,  C25D21/12 ,  C25D21/18

CPC分类号： C23C18/1617 ,  C23C18/1683 ,  C25D21/12 ,  C25D21/18

摘要： An improved method of stabilizing wet chemical baths is disclosed. Typically such baths are used in processes for treating workpieces, for example, plating processes for plating metal onto substrates. In particular, the present invention relates to copper plating baths. More particularly, the present invention relates to the stability of copper plating baths. More particularly, the present invention relates to prevention of void formation by monitoring the accumulation of deleterious by-products in copper plating baths.

摘要翻译： 公开了一种稳定湿化学浴的改进方法。 通常，这种浴用于处理工件的工艺中，例如用于将金属电镀到基底上的电镀工艺。 特别地，本发明涉及镀铜浴。 更具体地说，本发明涉及镀铜浴的稳定性。 更具体地，本发明涉及通过监测铜电镀浴中有害副产物的积累来防止空隙形成。

公开(公告)号：US20060163055A1

公开(公告)日：2006-07-27

申请号：US11050899

申请日：2005-01-27

申请人： Philippe Vereecken ,  Panayotis Andricacos ,  Hariklia Deligianni ,  Keith Kwietniak ,  Caliopi Andricacos

发明人： Philippe Vereecken ,  Panayotis Andricacos ,  Hariklia Deligianni ,  Keith Kwietniak ,  Caliopi Andricacos

IPC分类号： C25D21/12

CPC分类号： C25D21/12 ,  H01L21/2885 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： An apparatus for direct electroplating of a conductive material, such as copper, on resistive liners or substrates is provided. The apparatus includes an integrated in-situ measuring system to follow the actual progress of the front of the conductive material during plating. Feed-back of this information to a power supply allows for more precise control of the effective current density during plating.

摘要翻译： 提供了一种用于在电阻衬片或衬底上直接电镀诸如铜的导电材料的设备。 该装置包括一体化的原位测量系统，以跟踪电镀期间导电材料前部的实际进展。 将该信息反馈给电源允许在电镀期间更有效地控制有效电流密度。

公开(公告)号：US20050037608A1

公开(公告)日：2005-02-17

申请号：US10639989

申请日：2003-08-13

申请人： Panayotis Andricacos ,  Emanuel Cooper ,  Timothy Dalton ,  Hariklia Deligianni ,  Daniel Guidotti ,  Keith Kwietniak ,  Michelle Steen ,  Cornelia Tsang

发明人： Panayotis Andricacos ,  Emanuel Cooper ,  Timothy Dalton ,  Hariklia Deligianni ,  Daniel Guidotti ,  Keith Kwietniak ,  Michelle Steen ,  Cornelia Tsang

IPC分类号： H01L21/288 ,  H01L21/3065 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/2885 ,  H01L21/30655 ,  H01L21/76898

摘要： Flared and non-flared metallized deep vias having aspect ratios of about 2 or greater are provided. Blind vias have been fabricated in silicon substrates up to a depth of about 300 microns, and flared through vias have been fabricated up to about 750 microns, the approximate thickness of a silicon substrate wafer, enabling the formation of electrical connections at either or both ends of a via. In spite of the depth and high aspect ratios attainable, the etched vias are completely filled with plated copper conductor, completing the formation of deep vias and allowing fuller use of both sides of the substrate.

摘要翻译： 提供具有约2或更大的纵横比的扩张和未扩口的金属化深通孔。 盲孔已经在硅衬底中制造达到约300微米的深度，并且通过通孔已经被制造高达约750微米，硅衬底晶片的大致厚度，使得能够在两端或两端形成电连接 的通道。 尽管可以获得深度和高纵横比，但是蚀刻的通孔完全被电镀铜导体填充，从而形成深通孔并允许更充分地使用基板的两侧。