公开(公告)号：US07407875B2

公开(公告)日：2008-08-05

申请号：US11470349

申请日：2006-09-06

申请人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

发明人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

IPC分类号： H01L21/20 ,  H01L21/44

CPC分类号： H01L21/76846 ,  H01L21/76856

摘要： Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.

摘要翻译： 本发明的实施例提供一种在半导体器件和后端串联之间的电介质材料层中制造接触结构的方法。 该方法包括在所述介电材料层中形成至少一个接触开口; 通过化学气相沉积工艺形成第一TiN膜，所述第一TiN膜衬在所述接触开口上; 以及通过物理气相沉积工艺形成第二TiN膜，所述第二TiN膜衬在所述第一TiN膜上。 还提供了根据本发明的实施例制造的接触结构。

公开(公告)号：US20080054326A1

公开(公告)日：2008-03-06

申请号：US11470349

申请日：2006-09-06

申请人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

发明人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

IPC分类号： H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L21/76846 ,  H01L21/76856

摘要： Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.

摘要翻译： 本发明的实施例提供一种在半导体器件和后端串联之间的电介质材料层中制造接触结构的方法。 该方法包括在所述介电材料层中形成至少一个接触开口; 通过化学气相沉积工艺形成第一TiN膜，所述第一TiN膜衬在所述接触开口上; 以及通过物理气相沉积工艺形成第二TiN膜，所述第二TiN膜衬在所述第一TiN膜上。 还提供了根据本发明的实施例制造的接触结构。

公开(公告)号：US20080138985A1

公开(公告)日：2008-06-12

申请号：US11567517

申请日：2006-12-06

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.

摘要翻译： 形成用于半导体器件的硅化物触点的方法包括在约250至约400℃的初始脱气温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移至沉积室， 将晶片从脱气室转移到沉积室之后，在晶片上方的镍含量层，以及对半导体晶片进行退火，以在晶片上形成硅材料的部分上形成硅化物区域，其中镍材料形成在硅上。

公开(公告)号：US07485572B2

公开(公告)日：2009-02-03

申请号：US11534714

申请日：2006-09-25

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong

IPC分类号： H01L29/45

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at a temperature of about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a cobalt layer over the wafer at a point in time when the semiconductor wafer has cooled to temperature range of about 275-300° C., depositing a cap layer over the cobalt layer, and annealing the semiconductor wafer so as to create silicide contacts at portions on the wafer where cobalt is formed over silicon.

摘要翻译： 一种形成用于半导体器件的硅化物接触的方法包括在约400℃的温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移到沉积室，在晶片上沉积钴层 在半导体晶片已经冷却到约275-300℃的温度范围的时间点，在钴层上沉积覆盖层，并对半导体晶片进行退火，以在晶片上的部分形成硅化物接触，其中钴 在硅上形成。

公开(公告)号：US20080124925A1

公开(公告)日：2008-05-29

申请号：US11534714

申请日：2006-09-25

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at a temperature of about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a cobalt layer over the wafer at a point in time when the semiconductor wafer has cooled to temperature range of about 275-300° C., depositing a cap layer over the cobalt layer, and annealing the semiconductor wafer so as to create silicide contacts at portions on the wafer where cobalt is formed over silicon.

摘要翻译： 一种形成用于半导体器件的硅化物接触的方法包括在约400℃的温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移到沉积室，在晶片上沉积钴层 在半导体晶片已经冷却到约275-300℃的温度范围的时间点，在钴层上沉积覆盖层，并对半导体晶片进行退火，以在晶片上的部分形成硅化物接触，其中钴 在硅上形成。

公开(公告)号：US07622386B2

公开(公告)日：2009-11-24

申请号：US11567517

申请日：2006-12-06

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.

摘要翻译： 形成用于半导体器件的硅化物触点的方法包括在约250至约400℃的初始脱气温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移至沉积室， 将晶片从脱气室转移到沉积室之后，在晶片上方的镍含量层，以及对半导体晶片进行退火，以在晶片上形成硅材料的部分上形成硅化物区域，其中镍材料形成在硅上。

公开(公告)号：US20100208869A1

公开(公告)日：2010-08-19

申请号：US12372104

申请日：2009-02-17

申请人： Thomas N. Adam ,  Eric C. Harley ,  Anita Madan ,  Teresa L. Pinto

发明人： Thomas N. Adam ,  Eric C. Harley ,  Anita Madan ,  Teresa L. Pinto

IPC分类号： G01N23/20 ,  G06F17/00

CPC分类号： G01N23/20 ,  G01N2223/6116

摘要： In a method for use of x-ray diffraction to measure the strain on the top silicon germanium layer of an SOI substrate, the location of the peak diffraction area of an upper silicon layer of the SOI substrate is determined by first determining the peak diffraction area of the upper silicon layer on a reference pad (where the SOI thickness is about 700-900 Angstroms) within a die formed on a semiconductor wafer. The x-ray beam then moves to that location on the pad of interest to be measured and begins the XRD scan on the pad of interest to ultimately determine the strain of the top silicon germanium layer of the pad of interest

摘要翻译： 在使用x射线衍射测量SOI衬底的顶部硅锗层上的应变的方法中，SOI衬底的上硅层的峰值衍射面积的位置是通过首先确定峰值衍射面积 在半导体晶片上形成的晶片内的参考焊盘（其中SOI厚度为约700-900埃）上硅层。 X射线束然后移动到要测量的感兴趣的焊盘上的该位置，并且在感兴趣的焊盘上开始XRD扫描，以最终确定感兴趣焊盘顶部硅锗层的应变

公开(公告)号：US07119016B2

公开(公告)日：2006-10-10

申请号：US10684596

申请日：2003-10-15

申请人： Ashima B. Chakravarti ,  Anita Madan ,  Woo-Hyeong Lee ,  Gregory Wayne Dibello ,  Ramaseshan Suryanarayanan Iyer

发明人： Ashima B. Chakravarti ,  Anita Madan ,  Woo-Hyeong Lee ,  Gregory Wayne Dibello ,  Ramaseshan Suryanarayanan Iyer

IPC分类号： H01L21/36

CPC分类号： C23C16/36 ,  C23C16/24 ,  H01L21/02532 ,  H01L21/0262

摘要： A compound that includes at least Si, N and C in any combination, such as compounds of formula (R—NH)4-nSiXn wherein R is an alkyl group (which may be the same or different), n is 1, 2 or 3, and X is H or halogen (such as, e.g., bis-tertiary butyl amino silane (BTBAS)), may be mixed with silane or a silane derivative to produce a film. A polysilicon silicon film may be grown by mixing silane (SiH4) or a silane derviative and a compound including Si, N and C, such as BTBAS. Films controllably doped with carbon and/or nitrogen (such as layered films) may be grown by varying the reagents and conditions.

摘要翻译： 至少包含任何组合中的Si，N和C的化合物，例如式（R-NH）4-n-SiX n N的化合物，其中R是烷基 （其可以相同或不同），n为1,2或3，X为H或卤素（例如双叔丁基氨基硅烷（BTBAS））可与硅烷或硅烷衍生物混合 制作一部电影。 可以通过混合硅烷（SiH 4 SO 4）或硅烷衍生物和包括Si，N和C的化合物如BTBAS来生长多晶硅硅膜。 可以通过改变试剂和条件来生长可控地掺杂有碳和/或氮的膜（例如层状膜）。

公开(公告)号：US08105955B2

公开(公告)日：2012-01-31

申请号：US11464664

申请日：2006-08-15

申请人： Jin Ping Liu ,  Richard J. Murphy ,  Anita Madan ,  Ashima B. Chakravarti

发明人： Jin Ping Liu ,  Richard J. Murphy ,  Anita Madan ,  Ashima B. Chakravarti

IPC分类号： H01L21/31

CPC分类号： H01L29/78 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02532 ,  H01L29/1054

摘要： An integrated circuit system includes a substrate, a carbon-containing silicon region over the substrate, a non-carbon-containing silicon region over the substrate, and a silicon-carbon region, including the non-carbon-containing silicon region and the carbon-containing silicon region.

摘要翻译： 集成电路系统包括衬底，衬底上的含碳的硅区域，衬底上的非含碳的硅区域和包含非含碳硅区域和碳 - 碳区域的硅 - 碳区域， 含硅区域。

公开(公告)号：US20060087400A1

公开(公告)日：2006-04-27

申请号：US10711460

申请日：2004-09-20

申请人： Anil Chinthakindi ,  Anita Madan ,  Kenneth Stein ,  Kwong Wong

发明人： Anil Chinthakindi ,  Anita Madan ,  Kenneth Stein ,  Kwong Wong

IPC分类号： H01C1/012

CPC分类号： H01C17/075 ,  H01C7/006 ,  H01C7/06

摘要： An integrated circuit includes a bilayer thin film resistor in which the lower layer is a seed layer that controls the crystal structure of the upper layer. The thickness of the lower layer and the thickness of the upper layer may be chosen to form a resistor with a TCR having a design value.

摘要翻译： 集成电路包括双层薄膜电阻器，其中下层是控制上层晶体结构的晶种层。 可以选择下层的厚度和上层的厚度以形成具有设计值的TCR的电阻器。