公开(公告)号：US5826129A

公开(公告)日：1998-10-20

申请号：US496319

申请日：1995-06-29

申请人： Keizo Hasebe ,  Shinji Nagashima ,  Norio Semba ,  Masami Akimoto ,  Yoshio Kimura ,  Naruaki Iida ,  Kouji Harada ,  Issei Ueda ,  Nobuo Konishi

发明人： Keizo Hasebe ,  Shinji Nagashima ,  Norio Semba ,  Masami Akimoto ,  Yoshio Kimura ,  Naruaki Iida ,  Kouji Harada ,  Issei Ueda ,  Nobuo Konishi

IPC分类号： H01L21/00 ,  G03D5/00

CPC分类号： H01L21/67173 ,  H01L21/67178 ,  H01L21/67184

摘要： This invention provides a substrate processing system including a cassette station on which at least one cassette containing a plurality of objects is placed, a process station including a plurality of process chambers for performing processing for the objects, and an object conveying unit for loading the objects into the process chambers and unloading the objects from the process chambers, a first object transfer unit for transferring the objects between the cassette station and the process station, and an interface section including an object waiting region where the objects wait, and a second object transfer unit for transferring the objects to the process station, wherein the process chambers in the process station are arranged around the object conveying unit, and the object conveying unit has a rotating shaft almost parallel to the vertical direction and can move up and down in the vertical direction along the rotating shaft and rotate about the rotating shaft.

摘要翻译： 本发明提供了一种基板处理系统，其包括：盒站，其上放置有至少一个包含多个物体的盒;处理站，包括用于对物体进行处理的多个处理室;以及物体传送单元，用于装载物体 进入处理室并从处理室卸载物体，第一物体传送单元，用于在物体站和处理站之间传送物体，以及接口部分，其包括物体等待的对象等待区域，以及第二物体传送 用于将物体传送到处理站的单元，其中处理站中的处理室围绕物体传送单元布置，物体传送单元具有几乎平行于垂直方向的旋转轴，并且可以在竖直方向上上下移动 沿着旋转轴的方向旋转并围绕旋转轴旋转。

公开(公告)号：US06332724B1

公开(公告)日：2001-12-25

申请号：US09653162

申请日：2000-09-01

申请人： Mitsuteru Yano ,  Norio Semba ,  Kouzou Kanagawa ,  Issei Ueda ,  Masami Akimoto ,  Kazuhiko Ohi

发明人： Mitsuteru Yano ,  Norio Semba ,  Kouzou Kanagawa ,  Issei Ueda ,  Masami Akimoto ,  Kazuhiko Ohi

IPC分类号： H01L21027

CPC分类号： H01L21/67248 ,  G03F7/16 ,  G03F7/30 ,  H01L21/67109 ,  Y10S134/902

摘要： Outside air taken in from the outside is cooled to a predetermined temperature by a cooler, and the air cooled by the cooler flows through a low temperature side flow path in a heat exchanger, whereas outside air flows through a high temperature side flow path in the heat exchanger, which allows heat to be exchanged between the cooled air and the outside air. The air, flowing through the low temperature side flow path in the heat exchanger and warmed up by the outside air flowing through the high temperature side flow path, is warmed and humidified by a warmer and a humidifier, and the air with predetermined temperature and humidity is supplied to a coating processing unit. Moreover, the outside air, flowing through the high temperature side flow path in the heat exchanger and cooled by the air flowing through the low temperature side flow path, is warmed by a warmer, and the air with a predetermined temperature is supplied to a developing processing unit. Thus, an apparatus for regulating the temperature and humidity of air to be supplied to the coating processing unit and the developing processing unit can be downsized, and running costs for electric power consumption and the like can be reduced.

摘要翻译： 从外部吸入的外部空气通过冷却器被冷却到预定温度，并且由冷却器冷却的空气在热交换器中流过低温侧流路，而外部空气流过高温侧流路 热交换器，其允许在冷却的空气和外部空气之间进行热交换。 在热交换器中流过低温侧流路的空气被流经高温侧流路的外部空气加热，通过加温器和加湿器进行加热和加湿，并且具有预定温度和湿度的空气 被供给到涂布处理单元。 此外，在热交换器中流过高温侧流路并通过流经低温侧流路的空气进行冷却的外部空气被加热器加热，并且将具有预定温度的空气供给到显影 处理单元。 因此，可以将用于调节供给到涂布处理单元和显影处理单元的空气的温度和湿度的装置小型化，并且可以减少耗电量等的运行成本。

公开(公告)号：US20060165409A1

公开(公告)日：2006-07-27

申请号：US11335635

申请日：2006-01-20

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： G03D5/00

CPC分类号： H01L21/67184 ,  H01L21/00 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/6719

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system is capable of coping with either of a case where antireflection films are formed and a case where any antireflection film is not formed and needs simple software. Film forming unit blocks, namely, a TCT layer B3, a COT layer B4 and a BCT layer B5, and developing unit blocks, namely, DEV layers B1 and B2, are stacked up in layers in a processing block S2. The TCT layer B3, the COT layer B4 and the BCT layer B5 are used selectively in the case where antireflection films are formed and the case where any antireflection film is not formed. The coating and developing system is controlled by a simple carrying program and simple software.

摘要翻译： 涂覆显影系统包括：抗蚀剂膜形成单元块和层叠的抗反射膜形成单元块，以形成抗蚀剂膜和抗反射膜下面的抗反射膜以及在小空间中覆盖抗蚀剂膜的抗反射膜。 涂层显影系统能够应对形成防反射膜的情况和没有形成任何抗反射膜的情况，并且需要简单的软件。 成膜单位块，即TCT层B 3，COT层B 4和BCT层B 5以及显影单元块，即DEV层B 1和B 2，层叠在处理块S 在形成防反射膜的情况下选择性地使用TCT层B 3，COT层B 4和BCT层B 5以及未形成任何抗反射膜的情况。 涂层和显影系统由简单的携带程序和简单的软件控制。

公开(公告)号：US07245348B2

公开(公告)日：2007-07-17

申请号：US11117566

申请日：2005-04-29

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： G03B27/52

CPC分类号： H01L21/67184 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/6719

摘要： A coating and developing system includes an auxiliary block, a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system can cope with either a case where antireflection films are formed or a case where no antireflection film is formed. Film forming unit blocks, namely, a TCT layer, a COT layer and a BCT layer, and developing unit blocks, namely, DEV layers, are stacked up in layers in a processing block S2. The TCT layer, the COT layer and the BCT layer are used selectively in the case where antireflection films are formed and the case where any antireflection film is not formed. The coating and developing system is controlled by a carrying program.

摘要翻译： 涂覆显影系统包括辅助块，抗蚀剂膜形成单元块和层叠的抗反射膜形成单元块，以形成抗蚀剂膜和抗蚀剂膜下面的抗反射膜，以及抗反射膜，覆盖抗蚀剂膜 空间。 涂覆和显影系统可以应对形成防反射膜的情况或不形成抗反射膜的情况。 成膜单位块，即TCT层，COT层和BCT层，以及显影单元块，即DEV层，在处理块S2中层叠。 在形成防反射膜的情况下选择性地使用TCT层，COT层和BCT层以及未形成任何抗反射膜的情况。 涂层和显影系统由携带程序控制。

公开(公告)号：US20070056514A1

公开(公告)日：2007-03-15

申请号：US11342616

申请日：2006-01-31

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： C23C16/00

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67745

摘要： Provided is a coating and developing apparatus composed of an assembly of plural unit blocks. A first unit-block stack and a second unit-block stack are arranged at different positions with respect to front-and-rear direction. Unit blocks for development, each of which comprises plural processing units including a developing unit that performs developing process after exposure and a transfer device that transfers a substrate among the processing units, are arranged at the lowermost level. Unit blocks for application, or coating, each of which comprises plural processing units including a coating unit that performs application process before exposure and a transfer device that transfers a substrate among the processing units, are arranged above the unit blocks for development. Unit blocks for application are arranged in both the first and second unit-block stacks. Unit blocks for application which a wafer goes through are determined depending on the layering positional relationship between an antireflective film and a resist film. An exposed wafer goes only through the unit block for development without going through any one of the unit blocks for application.

摘要翻译： 提供一种由多个单元块组成的涂层显影装置。 第一单位块堆叠和第二单位块堆叠被布置在相对于前后方向的不同位置。 用于显影的单元块，每个包括多个处理单元，包括执行曝光之后的显影处理的显影单元和在处理单元之间传送基板的转印装置布置在最下层。 用于应用或涂布的单元块包括多个处理单元，包括在曝光之前进行施加处理的涂布单元和在处理单元之间传送基板的转印装置，布置在用于显影的单位块上方。 用于应用的单元块被布置在第一和第二单元块堆叠中。 根据防反射膜和抗蚀剂膜之间的层叠位置关系确定晶片通过的应用单元块。 暴露的晶片仅通过单元块进行开发，而不经过用于应用的单元块中的任何一个。

公开(公告)号：US20060162858A1

公开(公告)日：2006-07-27

申请号：US11336990

申请日：2006-01-23

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B32B37/00

CPC分类号： H01L21/6715 ,  H01L21/00 ,  H01L21/67178 ,  H01L21/67184 ,  H01L21/6719

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system is capable of coping with either of a case where antireflection films are formed and a case where any antireflection film is not formed and needs simple software. Film forming unit blocks, namely, a TCT layer B3, a COT layer B4 and a BCT layer B5, and developing unit blocks, namely, DEV layers B1 and B2, are stacked up in layers in a processing block S2. The TCT layer B3, the COT layer B4 and the BCT layer B5 are used selectively in the case where antireflection films are formed and the case where any antireflection film is not formed. The coating and developing system is controlled by a simple carrying program and simple software.

公开(公告)号：US20100300353A1

公开(公告)日：2010-12-02

申请号：US12855534

申请日：2010-08-12

申请人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05C9/12

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67745

摘要： Provided is a coating and developing apparatus composed of an assembly of plural unit blocks. A first unit-block stack and a second unit-block stack are arranged at different positions with respect to front-and-rear direction. Unit blocks for development, each of which comprises plural processing units including a developing unit that performs developing process after exposure and a transfer device that transfers a substrate among the processing units, are arranged at the lowermost level. Unit blocks for application, or coating, each of which comprises plural processing units including a coating unit that performs application process before exposure and a transfer device that transfers a substrate among the processing units, are arranged above the unit blocks for development. Unit blocks for application are arranged in both the first and second unit-block stacks. Unit blocks for application which a wafer goes through are determined depending on the layering positional relationship between an antireflective film and a resist film. An exposed wafer goes only through the unit block for development without going through any one of the unit blocks for application.

摘要翻译： 提供一种由多个单元块组成的涂层显影装置。 第一单位块堆叠和第二单位块堆叠被布置在相对于前后方向的不同位置。 用于显影的单元块，每个包括多个处理单元，包括执行曝光之后的显影处理的显影单元和在处理单元之间传送基板的转印装置布置在最下层。 用于应用或涂布的单元块包括多个处理单元，包括在曝光之前进行施加处理的涂布单元和在处理单元之间传送基板的转印装置，布置在用于显影的单位块上方。 用于应用的单元块被布置在第一和第二单元块堆叠中。 根据防反射膜和抗蚀剂膜之间的层叠位置关系确定晶片通过的应用单元块。 暴露的晶片仅通过单元块进行开发，而不经过用于应用的单元块中的任何一个。

公开(公告)号：US07267497B2

公开(公告)日：2007-09-11

申请号：US11117552

申请日：2005-04-29

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： G03D5/00

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system can cope with either of a case where antireflection films are formed and where any antireflection film is not formed. Film forming unit blocks: TCT layer B3, a COT layer B4 and a BCT layer B5, and developing unit blocks: DEV layers B1 and B2, are stacked up in layers in a processing block S2. The TCT layer B3, the COT layer B4 and the BCT layer B5 are used selectively where antireflection films are formed and any antireflection film is not formed. The coating and developing system is controlled by a carrying program and software.

摘要翻译： 涂布显影系统包括：抗蚀剂膜形成单元块和抗反射膜形成单元块，其层叠以形成抗蚀剂膜和抗反射膜下面的抗反射膜以及在小空间中覆盖抗蚀剂膜的抗反射膜。 涂覆和显影系统可以应对形成防反射膜的情况和其中没有形成任何抗反射膜的情况。 成膜单元块：TCT层B 3，COT层B 4和BCT层B 5以及显影单元块DEV层B 1和B 2在处理块S2中层叠。 选择性地使用TCT层B 3，COT层B 4和BCT层B 5，其中形成防反射膜并且不形成任何抗反射膜。 涂层和显影系统由携带程序和软件控制。

公开(公告)号：US20060201423A1

公开(公告)日：2006-09-14

申请号：US11276662

申请日：2006-03-09

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05C13/02 ,  B05C11/00

CPC分类号： H01L21/67742 ,  G03F7/162 ,  H01L21/6715 ,  H01L21/67173 ,  H01L21/67178

摘要： A coating/developing device includes a processing block having a plurality of coating unit blocks stacked and a developing unit block stacked on the coating unit blocks. Each of the unit blocks is provided with a liquid processing unit for coating a liquid chemical on a substrate, a heating unit for heating the substrate, a cooling unit for cooling the substrate and a transfer unit for transferring the substrate between the units. The liquid processing unit is provided with a coating unit for coating a resist liquid on the substrate, a first bottom antireflection coating (BARC) forming unit for coating a liquid chemical for a BARC on the substrate before the resist liquid is coated thereon, and a second BARC forming unit for coating a liquid chemical for the BARC on the substrate after the resist liquid is coated thereon.

摘要翻译： 涂覆/显影装置包括具有堆叠的多个涂布单元块的处理块和堆叠在涂布单元块上的显影单元块。 每个单元块设置有用于在基板上涂覆液体化学品的液体处理单元，用于加热基板的加热单元，用于冷却基板的冷却单元和用于在单元之间转移基板的转移单元。 液体处理单元设置有用于在基板上涂覆抗蚀剂液体的涂布单元，在其上涂覆抗蚀剂液体之前，在基板上涂布用于BARC的液体化学品的第一底部抗反射涂层（BARC）形成单元，以及 第二BARC形成单元，用于在其上涂覆抗蚀剂液体之后，在基板上涂覆用于BARC的液体化学品。

公开(公告)号：US20100326353A1

公开(公告)日：2010-12-30

申请号：US12855524

申请日：2010-08-12

申请人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05C9/12

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67745

摘要： Provided is a coating and developing apparatus composed of an assembly of plural unit blocks. A first unit-block stack and a second unit-block stack are arranged at different positions with respect to front-and-rear direction. Unit blocks for development, each of which comprises plural processing units including a developing unit that performs developing process after exposure and a transfer device that transfers a substrate among the processing units, are arranged at the lowermost level. Unit blocks for application, or coating, each of which comprises plural processing units including a coating unit that performs application process before exposure and a transfer device that transfers a substrate among the processing units, are arranged above the unit blocks for development. Unit blocks for application are arranged in both the first and second unit-block stacks. Unit blocks for application which a wafer goes through are determined depending on the layering positional relationship between an antireflective film and a resist film. An exposed wafer goes only through the unit block for development without going through any one of the unit blocks for application.