公开(公告)号：US08481422B2

公开(公告)日：2013-07-09

申请号：US13455299

申请日：2012-04-25

申请人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Mei-Yee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

发明人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Mei-Yee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

IPC分类号： H01L21/4763

CPC分类号： H01L21/3141 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31608 ,  H01L21/76814 ,  H01L21/76831

摘要： A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch.

摘要翻译： 提供了一种处理基板的方法和装置。 在基板上形成多孔介电层。 在一些实施例中，电介质可以由致密的电介质层封盖。 对电介质层进行图案化，并且将致密的电介质层保形地沉积在衬底上。 密实的保形介电层密封多孔介电层的孔隙，防止与可能渗入孔隙的物质接触。 通过方向选择性蚀刻去除覆盖图案开口的场区域和底部的稠密共形孔隙电介质层的部分。

公开(公告)号：US20120208366A1

公开(公告)日：2012-08-16

申请号：US13455299

申请日：2012-04-25

申请人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

发明人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang Sub Yim

IPC分类号： H01L21/311

CPC分类号： H01L21/3141 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31608 ,  H01L21/76814 ,  H01L21/76831

摘要： A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch.

摘要翻译： 提供了一种处理基板的方法和装置。 在基板上形成多孔介电层。 在一些实施例中，电介质可以由致密的电介质层封盖。 对电介质层进行图案化，并且将致密的电介质层保形地沉积在衬底上。 密实的保形介电层密封多孔介电层的孔隙，防止与可能渗入孔隙的物质接触。 通过定向选择性蚀刻去除覆盖图案开口的场区域和底部部分的致密保形孔隙电介质层的部分。

公开(公告)号：US08236684B2

公开(公告)日：2012-08-07

申请号：US12147986

申请日：2008-06-27

申请人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang sub Yim

发明人： Kelvin Chan ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang sub Yim

IPC分类号： H01L21/4763

CPC分类号： H01L21/3141 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31608 ,  H01L21/76814 ,  H01L21/76831

摘要： A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch.

摘要翻译： 提供了一种处理基板的方法和装置。 在基板上形成多孔介电层。 在一些实施例中，电介质可以由致密的电介质层封盖。 对电介质层进行图案化，并且将致密的电介质层保形地沉积在衬底上。 密实的保形介电层密封多孔介电层的孔隙，防止与可能渗入孔隙的物质接触。 通过定向选择性蚀刻去除覆盖图案开口的场区域和底部部分的致密保形孔隙电介质层的部分。

公开(公告)号：US20090325381A1

公开(公告)日：2009-12-31

申请号：US12147986

申请日：2008-06-27

申请人： KELVIN CHAN ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang sub Yim

发明人： KELVIN CHAN ,  Khaled A. Elsheref ,  Alexandros T. Demos ,  Meiyee Shek ,  Lipan Li ,  Li-Qun Xia ,  Kang sub Yim

IPC分类号： H01L21/44

CPC分类号： H01L21/3141 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/31116 ,  H01L21/31608 ,  H01L21/76814 ,  H01L21/76831

摘要： A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch.

摘要翻译： 提供了一种处理基板的方法和装置。 在基板上形成多孔介电层。 在一些实施例中，电介质可以由致密的电介质层封盖。 对电介质层进行图案化，并且将致密的电介质层保形地沉积在衬底上。 密实的保形介电层密封多孔介电层的孔隙，防止与可能渗入孔隙的物质接触。 通过定向选择性蚀刻去除覆盖图案开口的场区域和底部部分的致密保形孔隙电介质层的部分。

公开(公告)号：US07879683B2

公开(公告)日：2011-02-01

申请号：US11869396

申请日：2007-10-09

申请人： Amir Al-Bayati ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang “David” Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

发明人： Amir Al-Bayati ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang “David” Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

IPC分类号： H01L21/76

CPC分类号： H01L21/7682 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76885

摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

摘要翻译： 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层， 在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分 在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

公开(公告)号：US07611996B2

公开(公告)日：2009-11-03

申请号：US11085416

申请日：2005-03-21

申请人： Francimar Schmitt ,  Yi Zheng ,  Kang Sub Yim ,  Sang H. Ahn ,  Lester A. D'Cruz ,  Dustin W. Ho ,  Alexandros T. Demos ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

发明人： Francimar Schmitt ,  Yi Zheng ,  Kang Sub Yim ,  Sang H. Ahn ,  Lester A. D'Cruz ,  Dustin W. Ho ,  Alexandros T. Demos ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

IPC分类号： H01L21/469 ,  H01L21/31

CPC分类号： H01L21/76825 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/3105 ,  H01L21/3121 ,  H01L21/31695 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/7682 ,  H01L2221/1047 ,  Y10T428/249978

摘要： Embodiments in accordance with the present invention relate to multi-stage curing processes for chemical vapor deposited low K materials. In certain embodiments, a combination of electron beam irradiation and thermal exposure steps may be employed to control selective outgassing of porogens incorporated into the film, resulting in the formation of nanopores. In accordance with one specific embodiment, a low K layer resulting from reaction between a silicon-containing component and a non-silicon containing component featuring labile groups, may be cured by the initial application of thermal energy, followed by the application of radiation in the form of an electron beam.

摘要翻译： 根据本发明的实施方案涉及用于化学气相沉积的低K材料的多阶段固化方法。 在某些实施方案中，可以采用电子束照射和热暴露步骤的组合来控制掺入薄膜中的孔原子的选择性除气，从而形成纳米孔。 根据一个具体实施方案，由含硅组分和含有不稳定基团的不含硅组分之间的反应产生的低K层可以通过初始施加热能来固化，随后在 形式的电子束。

公开(公告)号：US20090093112A1

公开(公告)日：2009-04-09

申请号：US11869396

申请日：2007-10-09

申请人： AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang 'David' Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

发明人： AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang 'David' Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

IPC分类号： H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76885

摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

摘要翻译： 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层， 在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分 在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

公开(公告)号：US20110104891A1

公开(公告)日：2011-05-05

申请号：US12986809

申请日：2011-01-07

申请人： AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang David Cui ,  Mihaela Balseanu ,  Meiyee Maggie Le Shek ,  Li-Qun Xia

发明人： AMIR AL-BAYATI ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang David Cui ,  Mihaela Balseanu ,  Meiyee Maggie Le Shek ,  Li-Qun Xia

IPC分类号： H01L21/768

CPC分类号： H01L21/7682 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76885

摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

摘要翻译： 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层， 在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分 在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

公开(公告)号：US20130333923A1

公开(公告)日：2013-12-19

申请号：US13495545

申请日：2012-06-13

申请人： Mihaela Balseanu ,  Stephan A. Cohen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Son V. Nguyen ,  Mei-Yee Shek ,  Hosadurga Shobha ,  Li-Qun Xia

发明人： Mihaela Balseanu ,  Stephan A. Cohen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Son V. Nguyen ,  Mei-Yee Shek ,  Hosadurga Shobha ,  Li-Qun Xia

IPC分类号： C23C16/34 ,  H05K1/02

CPC分类号： C23C16/345 ,  C23C16/56 ,  H01L21/4803 ,  H05K1/0298 ,  Y10T428/24975

摘要： A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.

摘要翻译： 将厚度为0.5纳米至2.4纳米的氮化硅层沉积在基底上。 在层上进行等离子体氮化处理。 对于多个附加氮化硅层重复这些步骤，直到达到预定厚度。 可以使用这样的步骤来提供形成在具有介电材料的上表面的衬底上的多层氮化硅电介质，其中Cu和其它导体嵌入其中并且多个步骤。 多层氮化硅电介质具有各自具有0.5纳米至2.4纳米厚度的多个单独层，多层氮化硅电介质保形地覆盖具有至少百分之七十的保形度的基底的步骤。 还提供了多层氮化硅电介质，以及使用该多层氮化硅电介质的多层后端的布线结构。

公开(公告)号：US07923386B2

公开(公告)日：2011-04-12

申请号：US12560941

申请日：2009-09-16

申请人： Mihaela Balseanu ,  Mei-yee Shek ,  Li-Qun Xia ,  Hichem M'Saad

发明人： Mihaela Balseanu ,  Mei-yee Shek ,  Li-Qun Xia ,  Hichem M'Saad

IPC分类号： H01L21/31

CPC分类号： H01L21/76834 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76829 ,  H01L21/76831

摘要： A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.

摘要翻译： 提供了一种在室中的衬底上形成层的方法，其中衬底在其表面上具有至少一个形成的特征。 该方法包括在存在等离子体的情况下将衬底暴露于含硅前体以沉积一层，用等离子体处理沉积层，并重复曝光和处理，直到获得所需层厚。 等离子体可以由含氧气体产生。