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222 条记录 (耗时 0.03 秒)

    Integrated high-performance decoupling capacitor and heat sink
    3.
    发明授权
    Integrated high-performance decoupling capacitor and heat sink 失效
    集成高性能去耦电容和散热片

    公开(公告)号：US06548338B2

    公开(公告)日：2003-04-15

    申请号：US09764504

    申请日：2001-01-17

    申请人： Kerry Bernstein ,  Robert M. Geffken ,  Wilbur D. Pricer ,  Anthony K. Stamper ,  Steven H. Voldman

    发明人： Kerry Bernstein ,  Robert M. Geffken ,  Wilbur D. Pricer ,  Anthony K. Stamper ,  Steven H. Voldman

    IPC分类号： H01L218238

    CPC分类号： H01L28/40 ,  H01L23/3672 ,  H01L23/3735 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

    摘要： A significant and very effective decoupling capacitor and heat sink combination that, in a single structure provides both a heat sink and a decoupling capacitor in close proximity to the active circuit on the chip requiring either heat sinking or decoupling capacitance or both. This is achieved by forming on a semiconductor chip, having a buried oxide layer therein, an integrated high-performance decoupling capacitor that uses a metallic deposit greater than 30 microns thick formed on the back surface of the chip and electrically connected to the active chip circuit to result in a significant and very effective decoupling capacitor and heat sink in close proximity to the active circuit on the chip requiring such decoupling capacitance and heat sinking capabilities. The decoupling capacitance can use the substrate of the chip itself as one of the capacitive plates and a formed metallic deposit as the second capacitive plate which also serves as a heat sink for the active circuit formed in the chip. The structure thus provides both a significant and effective decoupling capacitance in close proximity to the active circuit on the chip requiring such decoupling capacitance as well as providing improved heat sinking for the decoupled active circuit.

    摘要翻译： 一种显着且非常有效的去耦电容器和散热器组合，其在单个结构中提供散热器和去耦电容器，其紧邻芯片上的有源电路，需要散热或去耦电容或两者兼有。 这通过在其中具有掩埋氧化物层的半导体芯片上形成集成的高性能去耦电容器来实现，所述高性能去耦电容器使用形成在芯片的背面上并且电连接到有源芯片电路的大于30微米厚的金属沉积物 导致显着且非常有效的去耦电容器和散热器紧邻芯片上的有源电路，需要这种去耦电容和散热能力。 去耦电容可以使用芯片本身的衬底作为电容板之一，并且形成金属沉积物作为第二电容板，其也用作形成在芯片中的有源电路的散热器。 因此，该结构提供了重要且有效的去耦电容，其紧邻芯片上的有源电路，需要这种去耦电容，并为解耦的有源电路提供改进的散热。

    Integrated high-performance decoupling capacitor and heat sink
    4.
    发明授权
    Integrated high-performance decoupling capacitor and heat sink 失效
    集成高性能去耦电容和散热片

    公开(公告)号：US06236103B1

    公开(公告)日：2001-05-22

    申请号：US09283828

    申请日：1999-03-31

    申请人： Kerry Bernstein ,  Robert M. Geffken ,  Wilbur D. Pricer ,  Anthony K. Stamper ,  Steven H. Voldman

    发明人： Kerry Bernstein ,  Robert M. Geffken ,  Wilbur D. Pricer ,  Anthony K. Stamper ,  Steven H. Voldman

    IPC分类号： H01L2900

    CPC分类号： H01L28/40 ,  H01L23/3672 ,  H01L23/3735 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

    摘要： A significant and very effective decoupling capacitor and heat sink combination that, in a single structure provides both a heat sink and a decoupling capacitor in close proximity to the active circuit on the chip requiring either heat sinking or decoupling capacitance or both. This is achieved by forming on a semiconductor chip, having a buried oxide layer therein, an integrated high-performance decoupling capacitor that uses a metallic deposit greater than 30 microns thick formed on the back surface of the chip and electrically connected to the active chip circuit to result in a significant and very effective decoupling capacitor and heat sink in close proximity to the active circuit on the chip requiring such decoupling capacitance and heat sinking capabilities. The decoupling capacitance can use the substrate of the chip itself as one of the capacitive plates and a formed metallic deposit as the second capacitive plate which also serves as a heat sink for the active circuit formed in the chip. The structure thus provides both a significant and effective decoupling capacitance in close proximity to the active circuit on the chip requiring such decoupling capacitance as well as providing improved heat sinking for the decoupled active circuit.

    摘要翻译： 一种显着且非常有效的去耦电容器和散热器组合，其在单个结构中提供散热器和去耦电容器，其紧邻芯片上的有源电路，需要散热或去耦电容或两者兼有。 这通过在其中具有掩埋氧化物层的半导体芯片上形成集成的高性能去耦电容器来实现，所述高性能去耦电容器使用形成在芯片的背面上并且电连接到有源芯片电路的大于30微米厚的金属沉积物 导致显着且非常有效的去耦电容器和散热器紧邻芯片上的有源电路，需要这种去耦电容和散热能力。 去耦电容可以使用芯片本身的衬底作为电容板之一，并且形成金属沉积物作为第二电容板，其也用作形成在芯片中的有源电路的散热器。 因此，该结构提供了重要且有效的去耦电容，其紧邻芯片上的有源电路，需要这种去耦电容，并为解耦的有源电路提供改进的散热。

    Circuit for operating a control transistor from a fusible link
    5.
    发明授权
    Circuit for operating a control transistor from a fusible link 失效
    用于从可熔链路操作控制晶体管的电路

    公开(公告)号：US5999037A

    公开(公告)日：1999-12-07

    申请号：US904397

    申请日：1997-07-31

    申请人： Kerry Bernstein ,  Daniel C. Edelstein ,  William A. Klaasen ,  Wilbur D. Pricer

    发明人： Kerry Bernstein ,  Daniel C. Edelstein ,  William A. Klaasen ,  Wilbur D. Pricer

    IPC分类号： G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/785

    摘要： A circuit for enabling a controlled transistor in response to an ablated fusible link. The fusible link is configured so that no d.c. potential resides on the link once it has been ablated. A source of alternating voltage is capacitively coupled to the fusible link and maintains the fusible link from reconnection due to dendrite formation once it is ablated. An a.c. to d.c. voltage converter is used to signal the change in condition of the fusible link, thus, actuating a control transistor of a redundant circuit element in a replacement operation.

    摘要翻译： 一种用于响应于消融的可熔链路启用受控晶体管的电路。 熔丝链接被配置为没有直流 一旦消融，电位就位于链接上。 交流电压源电容耦合到可熔链路，并且一旦烧蚀就会由于枝晶形成而使可熔连接件重新连接。 一个 到达 电压转换器用于发信号通知熔断条件的变化，从而在更换操作中致动冗余电路元件的控制晶体管。

    System technique for detecting soft errors in statically coupled CMOS logic
    6.
    发明授权
    System technique for detecting soft errors in statically coupled CMOS logic 失效
    用于检测静态耦合CMOS逻辑中的软错误的系统技术

    公开(公告)号：US06453431B1

    公开(公告)日：2002-09-17

    申请号：US09346509

    申请日：1999-07-01

    申请人： Kerry Bernstein ,  Andres Bryant ,  William A. Klaasen ,  Wilbur David Pricer

    发明人： Kerry Bernstein ,  Andres Bryant ,  William A. Klaasen ,  Wilbur David Pricer

    IPC分类号： G06K504

    CPC分类号： G11C5/005 ,  G06F11/00

    摘要： Circuit for detecting error transients in logic circuits due to atomic events or other non-recurring noise sources includes a first circuit coupled to a data line for sensing a first signal on the data line at a first point in time (T1) and a second circuit coupled to the data line for sensing the first signal on the data line at a second point in time (T2) such that a time difference between T1 and T2 is small enough so that the first signal is still present on the data line in the absence of a perturbation event and such that the time difference between T1 and T2 is large enough so that any such perturbation event is resolved. A compare circuit coupled to the first and second circuits compares the sensing of the first signal by the first and second circuits, and generates an error signal in response to a non-compare.

    摘要翻译： 用于检测由于原子事件或其他非循环噪声源引起的逻辑电路中的错误瞬变的电路包括耦合到数据线的第一电路，用于感测在第一时间点（T1）的数据线上的第一信号，以及第二电路 耦合到数据线，用于在第二时间点（T2）感测数据线上的第一信号，使得T1和T2之间的时间差足够小，使得第一信号在不存在的情况下仍然存在于数据线上 的扰动事件，并且使得T1和T2之间的时间差足够大，使得任何这样的扰动事件被解决。 耦合到第一和第二电路的比较电路比较第一和第二电路对第一信号的感测，并且响应于非比较而产生误差信号。