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公开(公告)号:US07863734B2
公开(公告)日:2011-01-04
申请号:US12186655
申请日:2008-08-06
申请人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
CPC分类号: H01L24/10 , H01L23/13 , H01L23/481 , H01L23/49833 , H01L23/5385 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/0655 , H01L2224/13 , H01L2224/13099 , H01L2224/14181 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H05K1/145 , H05K3/222 , H05K2201/10674 , Y10T436/171538 , Y10T436/172307 , H01L2924/00014 , H01L2924/00
摘要: An electronic device and method of packaging an electronic device. The device including: a first substrate, a second substrate and an integrated circuit chip having a first side and an opposite second side, a first set of chip pads on the first side and a second set of chip pads on the second side of the integrated circuit chip, chip pads of the first set of chip pads physically and electrically connected to corresponding substrate pads on the first substrate and chip pads of the second set of chip pads physically and electrically connected to substrate pads of the substrate.
摘要翻译: 一种电子装置和包装电子装置的方法。 该装置包括:第一基板,第二基板和具有第一侧和相对的第二侧的集成电路芯片,在第一侧上的第一组芯片焊盘和在集成的第二侧上的第二组芯片焊盘 电路芯片,第一组芯片焊盘的芯片焊盘物理和电连接到第一衬底上的对应衬底焊盘,并且第二组芯片焊盘的芯片焊盘物理和电连接到衬底的衬底焊盘。
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公开(公告)号:US07462509B2
公开(公告)日:2008-12-09
申请号:US11383595
申请日:2006-05-16
申请人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
CPC分类号: H01L24/10 , H01L23/13 , H01L23/481 , H01L23/49833 , H01L23/5385 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/0655 , H01L2224/13 , H01L2224/13099 , H01L2224/14181 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H05K1/145 , H05K3/222 , H05K2201/10674 , Y10T436/171538 , Y10T436/172307 , H01L2924/00014 , H01L2924/00
摘要: An method of packaging an electronic device. The method for packaging the device including: providing a first substrate, a second substrate and an integrated circuit chip having a first side and an opposite second side, a first set of chip pads on the first side and a second set of chip pads on the second side of the integrated circuit chip, chip pads of the first set of chip pads physically and electrically connected to corresponding substrate pads on the first substrate and chip pads of the second set of chip pads physically and electrically connected to substrate pads of the substrate.
摘要翻译: 一种封装电子设备的方法。 用于封装器件的方法包括:提供第一衬底,第二衬底和具有第一侧和相对第二侧的集成电路芯片,第一组芯片焊盘和第二组芯片焊盘, 集成电路芯片的第二侧,第一组芯片焊盘的芯片焊盘物理和电连接到第一衬底上的相应衬底焊盘,并且第二组芯片焊盘的芯片焊盘物理和电连接到衬底的衬底焊盘。
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公开(公告)号:US20070267746A1
公开(公告)日:2007-11-22
申请号:US11383595
申请日:2006-05-16
申请人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
CPC分类号: H01L24/10 , H01L23/13 , H01L23/481 , H01L23/49833 , H01L23/5385 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/0655 , H01L2224/13 , H01L2224/13099 , H01L2224/14181 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H05K1/145 , H05K3/222 , H05K2201/10674 , Y10T436/171538 , Y10T436/172307 , H01L2924/00014 , H01L2924/00
摘要: An electronic device and method of packaging an electronic device. The device including: a first substrate, a second substrate and an integrated circuit chip having a first side and an opposite second side, a first set of chip pads on the first side and a second set of chip pads on the second side of the integrated circuit chip, chip pads of the first set of chip pads physically and electrically connected to corresponding substrate pads on the first substrate and chip pads of the second set of chip pads physically and electrically connected to substrate pads of the substrate.
摘要翻译: 一种电子装置和包装电子装置的方法。 该装置包括:第一基板,第二基板和具有第一侧和相对的第二侧的集成电路芯片,在第一侧上的第一组芯片焊盘和在集成的第二侧上的第二组芯片焊盘 电路芯片,第一组芯片焊盘的芯片焊盘物理和电连接到第一衬底上的对应衬底焊盘,并且第二组芯片焊盘的芯片焊盘物理和电连接到衬底的衬底焊盘。
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公开(公告)号:US20090065925A1
公开(公告)日:2009-03-12
申请号:US12186655
申请日:2008-08-06
申请人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Mark David Jaffe , Christopher David Muzzy , Wolfgang Sauter , Edmund Sprogis , Anthony Kendall Stamper
IPC分类号: H01L23/48
CPC分类号: H01L24/10 , H01L23/13 , H01L23/481 , H01L23/49833 , H01L23/5385 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/0655 , H01L2224/13 , H01L2224/13099 , H01L2224/14181 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H05K1/145 , H05K3/222 , H05K2201/10674 , Y10T436/171538 , Y10T436/172307 , H01L2924/00014 , H01L2924/00
摘要: An electronic device and method of packaging an electronic device. The device including: a first substrate, a second substrate and an integrated circuit chip having a first side and an opposite second side, a first set of chip pads on the first side and a second set of chip pads on the second side of the integrated circuit chip, chip pads of the first set of chip pads physically and electrically connected to corresponding substrate pads on the first substrate and chip pads of the second set of chip pads physically and electrically connected to substrate pads of the substrate.
摘要翻译: 一种电子装置和包装电子装置的方法。 该装置包括:第一基板,第二基板和具有第一侧和相对的第二侧的集成电路芯片,在第一侧上的第一组芯片焊盘和在集成的第二侧上的第二组芯片焊盘 电路芯片,第一组芯片焊盘的芯片焊盘物理和电连接到第一衬底上的对应衬底焊盘,并且第二组芯片焊盘的芯片焊盘物理和电连接到衬底的衬底焊盘。
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公开(公告)号:US08421126B2
公开(公告)日:2013-04-16
申请号:US13164173
申请日:2011-06-20
申请人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
IPC分类号: H01L27/085
CPC分类号: H01L25/0657 , H01L21/76895 , H01L23/481 , H01L23/522 , H01L23/5329 , H01L25/50 , H01L27/0688 , H01L2225/06513 , H01L2225/06527 , H01L2924/0002 , H01L2924/00
摘要: Semiconductor structures. The semiconductor structures include two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers or bonding them back to back utilizing an inter-substrate dielectric layer and a bonding layer between the buried oxide layers. The structures include contacts formed in the upper wafer to devices in the lower wafer and wiring levels formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
摘要翻译: 半导体结构。 半导体结构包括两个绝缘体上硅晶片,其中制造了器件,并且利用掩埋氧化物层将它们背靠背接合,或者使用衬底间介质层和掩埋氧化物层之间的结合层将它们背靠背连接。 这些结构包括形成在上晶片中的触点与下晶片中的器件和形成在上晶片上的布线电平。 下晶片可以包括布线水平。 下部晶片可以包括用于触点的着陆焊盘。 与下晶片的硅层的接触可以被硅化。
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公开(公告)号:US07989312B2
公开(公告)日:2011-08-02
申请号:US12612957
申请日:2009-11-05
申请人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
CPC分类号: H01L25/0657 , H01L21/76895 , H01L23/481 , H01L23/522 , H01L23/5329 , H01L25/50 , H01L27/0688 , H01L2225/06513 , H01L2225/06527 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
摘要翻译: 一种半导体结构及其制造方法。 该方法包括从具有在其中制造的器件的两个绝缘体上硅晶片上去除背面硅,并利用掩埋氧化物层将它们背对背地接合。 然后在上晶片中形成与下晶片中的器件接触,并在上晶片上形成布线层。 下晶片可以包括布线水平。 下部晶片可以包括用于触点的着陆焊盘。 与下晶片的硅层的接触可以被硅化。
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公开(公告)号:US08471306B2
公开(公告)日:2013-06-25
申请号:US13192608
申请日:2011-07-28
申请人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
IPC分类号: H01L29/80 , H01L29/04 , H01L31/036
CPC分类号: G06F17/5077 , H01L21/6835 , H01L21/76895 , H01L21/84 , H01L23/481 , H01L23/535 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L29/045 , H01L2221/6835 , H01L2221/68359 , H01L2221/68368 , H01L2224/83894 , H01L2224/9202 , H01L2225/06513 , H01L2924/01019 , H01L2924/01029 , H01L2924/0132 , H01L2924/1305 , H01L2924/14 , H01L2924/19041 , H01L2924/01007 , H01L2924/01022 , H01L2924/00
摘要: A double-sided integrated circuit chips, methods of fabricating the double-sided integrated circuit chips and design structures for double-sided integrated circuit chips. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
摘要翻译: 双面集成电路芯片,制造双面集成电路芯片的方法和双面集成电路芯片的设计结构。 该方法包括从具有在其中制造的器件的两个绝缘体上硅晶片上去除背面硅,并利用掩埋氧化物层将它们背对背地接合。 然后在上晶片中形成与下晶片中的器件接触,并在上晶片上形成布线层。 下晶片可以包括布线水平。 下部晶片可以包括用于触点的着陆焊盘。 与下晶片的硅层的接触可以被硅化。
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公开(公告)号:US20100044759A1
公开(公告)日:2010-02-25
申请号:US12612957
申请日:2009-11-05
申请人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
发明人: Kerry Bernstein , Timothy Dalton , Jeffrey Peter Gambino , Mark David Jaffe , Paul David Kartschoke , Stephen Ellinwood Luce , Anthony Kendall Stamper
IPC分类号: H01L29/786 , H01L21/18 , H01L21/768 , H01L23/48
CPC分类号: H01L25/0657 , H01L21/76895 , H01L23/481 , H01L23/522 , H01L23/5329 , H01L25/50 , H01L27/0688 , H01L2225/06513 , H01L2225/06527 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
摘要翻译: 一种半导体结构及其制造方法。 该方法包括从具有在其中制造的器件的两个绝缘体上硅晶片上去除背面硅,并利用掩埋氧化物层将它们背对背地接合。 然后在上晶片中形成与下晶片中的器件接触,并在上晶片上形成布线层。 下晶片可以包括布线水平。 下部晶片可以包括用于触点的着陆焊盘。 与下晶片的硅层的接触可以被硅化。
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公开(公告)号:US20110100685A1
公开(公告)日:2011-05-05
申请号:US12985456
申请日:2011-01-06
申请人: Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Christopher David Muzzy , Wolfgang Sauter
发明人: Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Christopher David Muzzy , Wolfgang Sauter
CPC分类号: H01L21/563 , H01L24/11 , H01L24/13 , H01L24/29 , H01L24/83 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13022 , H01L2224/131 , H01L2224/14136 , H01L2224/26152 , H01L2224/29111 , H01L2224/2919 , H01L2224/73204 , H01L2224/831 , H01L2224/83385 , H01L2225/06513 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/0105 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/14 , H01L2924/15747 , H01L2924/19041 , H01L2924/19043 , Y10S428/901 , Y10T29/49002 , Y10T29/49117 , Y10T29/4921 , Y10T29/49222 , Y10T428/24273 , Y10T428/24322 , Y10T428/24331 , Y10T428/24339 , Y10T428/24347 , Y10T428/24479 , Y10T428/24529 , Y10T428/24545 , Y10T428/24612 , H01L2924/00014 , H01L2924/01014 , H01L2924/01047 , H01L2924/01082 , H01L2224/13111 , H01L2924/0665 , H01L2224/05552 , H01L2924/00
摘要: An electrical structure and method of forming. The electrical structure includes a first substrate, a first dielectric layer, an underfill layer, a first solder structure, and a second substrate. The first dielectric layer is formed over a top surface of the first substrate. The first dielectric layer includes a first opening extending through a top surface and a bottom surface of said first dielectric layer. The first solder structure is formed within the first opening and over a portion of the top surface of said first dielectric layer. The second substrate is formed over and in contact with the underfill layer.
摘要翻译: 一种电气结构和成型方法。 电结构包括第一衬底,第一介电层,底部填充层,第一焊料结构和第二衬底。 第一介电层形成在第一基板的顶表面上。 第一电介质层包括延伸穿过所述第一电介质层的顶表面和底表面的第一开口。 第一焊料结构形成在第一开口内以及在所述第一介电层的顶表面的一部分之上。 第二衬底形成在底部填充层上并与底部填充层接触。
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公开(公告)号:US07911803B2
公开(公告)日:2011-03-22
申请号:US11872870
申请日:2007-10-16
申请人: Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Christopher David Muzzy , Wolfgang Sauter
发明人: Timothy Harrison Daubenspeck , Jeffrey Peter Gambino , Christopher David Muzzy , Wolfgang Sauter
IPC分类号: H05K7/10
CPC分类号: H01L24/10 , H01L23/49838 , H01L23/528 , H01L24/12 , H01L24/13 , H01L2224/0401 , H01L2224/05018 , H01L2224/05022 , H01L2224/05558 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2924/01013 , H01L2924/01029 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H05K1/0265 , H05K1/111 , H05K1/112 , H05K2201/0769 , H05K2201/09436 , H05K2201/09509 , H05K2201/0979 , Y02P70/611 , Y10T29/49144 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49179 , H01L2924/00
摘要: An electrical structure and method of forming. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current.
摘要翻译: 一种电气结构和成型方法。 电结构包括互连结构和衬底。 衬底包括导电焊盘和电连接到导电焊盘的多个导线迹线。 导电焊盘电连接和机械连接到互连结构。 多条导线包括第一线迹线,第二线迹线,第三线迹线和第四线迹线。 第一线迹和第二线迹均电连接到导电垫的第一侧。 第三线迹电连接到导电垫的第二侧。 第四线迹电连接到所述第一导电焊盘的第三侧。 多个导线配置成分布电流。
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