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    MOSFET structure with multiple self-aligned silicide contacts
    1.
    发明授权
    MOSFET structure with multiple self-aligned silicide contacts 有权
    具有多个自对准硅化物触点的MOSFET结构

    公开(公告)号：US07888264B2

    公开(公告)日：2011-02-15

    申请号：US12814942

    申请日：2010-06-14

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L21/44

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

    MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
    2.
    发明申请
    MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS 有权
    具有多个自对准硅化物接触的MOSFET结构

    公开(公告)号：US20080268600A1

    公开(公告)日：2008-10-30

    申请号：US12131973

    申请日：2008-06-03

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

    MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
    3.
    发明申请
    MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS 有权
    具有多个自对准硅化物接触的MOSFET结构

    公开(公告)号：US20100304563A1

    公开(公告)日：2010-12-02

    申请号：US12814942

    申请日：2010-06-14

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L21/283

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

    MOSFET structure with multiple self-aligned silicide contacts
    4.
    发明授权
    MOSFET structure with multiple self-aligned silicide contacts 失效
    具有多个自对准硅化物触点的MOSFET结构

    公开(公告)号：US07528067B2

    公开(公告)日：2009-05-05

    申请号：US11539236

    申请日：2006-10-06

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L21/4763

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

    MOSFET structure with multiple self-aligned silicide contacts
    5.
    发明授权
    MOSFET structure with multiple self-aligned silicide contacts 有权

    公开(公告)号：US07129548B2

    公开(公告)日：2006-10-31

    申请号：US10916201

    申请日：2004-08-11

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L29/94

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    MOSFET structure with multiple self-aligned silicide contacts
    6.
    发明授权
    MOSFET structure with multiple self-aligned silicide contacts 有权
    具有多个自对准硅化物触点的MOSFET结构

    公开(公告)号：US07737032B2

    公开(公告)日：2010-06-15

    申请号：US12131973

    申请日：2008-06-03

    申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

    IPC分类号： H01L21/44

    CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

    摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

    摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI)
    7.
    发明授权
    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) 失效
    拉伸应变SiGe绝缘体上的应变Si MOSFET（SGOI）

    公开(公告)号：US07485518B2

    公开(公告)日：2009-02-03

    申请号：US11684855

    申请日：2007-03-12

    申请人： Kevin K. Chan ,  Jack Q Chan ,  Kern Rim ,  Leathen Shi

    发明人： Kevin K. Chan ,  Jack Q Chan ,  Kern Rim ,  Leathen Shi

    IPC分类号： H01L21/336

    CPC分类号： H01L29/78687 ,  H01L21/2007 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/66742 ,  H01L29/7833 ,  H01L29/7842 ,  H01L29/78603

    摘要： A semiconductor structure for use as a template for forming high-performance metal oxide semiconductor field effect transistor (MOSFET) devices is provided. More specifically, the present invention provides a structure that includes a SiGe-on-insulator substrate including a tensile-strained SiGe alloy layer located atop an insulating layer; and a strained Si layer atop the tensile-strained SiGe alloy layer. The present invention also provides a method of forming the tensile-strained SGOI substrate as well as the heterostructure described above. The method of the present invention decouples the preference for high strain in the strained Si layer and the Ge content in the underlying layer by providing a tensile-strained SiGe alloy layer directly atop on an insulating layer.

    摘要翻译： 提供了用作形成高性能金属氧化物半导体场效应晶体管（MOSFET）器件的模板的半导体结构。 更具体地，本发明提供一种包括绝缘体上硅衬底的结构，其包括位于绝缘层顶部的拉伸应变SiGe合金层; 以及拉伸应变SiGe合金层顶部的应变Si层。 本发明还提供了形成拉伸应变SGOI基板以及上述异质结构的方法。 本发明的方法通过在绝缘层上直接提供拉伸应变SiGe合金层来分离应变Si层中的高应变和下层中的Ge含量的偏好。

    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI)
    8.
    发明授权
    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) 失效
    拉伸应变SiGe绝缘体上的应变Si MOSFET（SGOI）

    公开(公告)号：US07217949B2

    公开(公告)日：2007-05-15

    申请号：US10883443

    申请日：2004-07-01

    申请人： Kevin K. Chan ,  Jack O. Chu ,  Kern Rim ,  Leathen Shi

    发明人： Kevin K. Chan ,  Jack O. Chu ,  Kern Rim ,  Leathen Shi

    IPC分类号： H01L29/06

    CPC分类号： H01L29/78687 ,  H01L21/2007 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/66742 ,  H01L29/7833 ,  H01L29/7842 ,  H01L29/78603

    摘要： A semiconductor structure for use as a template for forming high-performance metal oxide semiconductor field effect transistor (MOSFET) devices is provided. More specifically, the present invention provides a structure that includes a SiGe-on-insulator substrate including a tensile-strained SiGe alloy layer located atop an insulating layer; and a strained Si layer atop the tensile-strained SiGe alloy layer. The present invention also provides a method of forming the tensile-strained SGOI substrate as well as the heterostructure described above. The method of the present invention decouples the preference for high strain in the strained Si layer and the Ge content in the underlying layer by providing a tensile-strained SiGe alloy layer directly atop on an insulating layer.

    摘要翻译： 提供了用作形成高性能金属氧化物半导体场效应晶体管（MOSFET）器件的模板的半导体结构。 更具体地，本发明提供一种包括绝缘体上硅衬底的结构，其包括位于绝缘层顶部的拉伸应变SiGe合金层; 以及拉伸应变SiGe合金层顶部的应变Si层。 本发明还提供了形成拉伸应变SGOI基板以及上述异质结构的方法。 本发明的方法通过在绝缘层上直接提供拉伸应变SiGe合金层来分离应变Si层中的高应变和下层中的Ge含量的偏好。

    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI)
    9.
    发明授权
    Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) 有权
    拉伸应变SiGe绝缘体上的应变Si MOSFET（SGOI）

    公开(公告)号：US08017499B2

    公开(公告)日：2011-09-13

    申请号：US12125175

    申请日：2008-05-22

    申请人： Kevin K. Chan ,  Jack O. Chu ,  Kern Rim ,  Leathen Shi

    发明人： Kevin K. Chan ,  Jack O. Chu ,  Kern Rim ,  Leathen Shi

    IPC分类号： H01L21/336

    CPC分类号： H01L29/78687 ,  H01L21/2007 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/66742 ,  H01L29/7833 ,  H01L29/7842 ,  H01L29/78603

    摘要： A semiconductor structure for use as a template for forming high-performance metal oxide semiconductor field effect transistor (MOSFET) devices is provided. More specifically, the present invention provides a structure that includes a SiGe-on-insulator substrate including a tensile-strained SiGe alloy layer located atop an insulating layer; and a strained Si layer atop the tensile-strained SiGe alloy layer. The present invention also provides a method of forming the tensile-strained SGOI substrate as well as the heterostructure described above. The method of the present invention decouples the preference for high strain in the strained Si layer and the Ge content in the underlying layer by providing a tensile-strained SiGe alloy layer directly atop on an insulating layer.

    摘要翻译： 提供了用作形成高性能金属氧化物半导体场效应晶体管（MOSFET）器件的模板的半导体结构。 更具体地，本发明提供一种包括绝缘体上硅衬底的结构，其包括位于绝缘层顶部的拉伸应变SiGe合金层; 以及拉伸应变SiGe合金层顶部的应变Si层。 本发明还提供了形成拉伸应变SGOI基板以及上述异质结构的方法。 本发明的方法通过在绝缘层上直接提供拉伸应变SiGe合金层来分离应变Si层中的高应变和下层中的Ge含量的偏好。

    Hetero-integrated strained silicon n- and p-MOSFETs
    10.
    发明授权
    Hetero-integrated strained silicon n- and p-MOSFETs 有权
    异质集成应变硅n和p-MOSFET

    公开(公告)号：US07396747B2

    公开(公告)日：2008-07-08

    申请号：US11840029

    申请日：2007-08-16

    申请人： Diane C. Boyd ,  Juan Cai ,  Kevin K. Chan ,  Patricia M. Mooney ,  Kern Rim

    发明人： Diane C. Boyd ,  Juan Cai ,  Kevin K. Chan ,  Patricia M. Mooney ,  Kern Rim

    IPC分类号： H01L21/265 ,  H01L21/00 ,  H01L21/84

    CPC分类号： H01L29/1054 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823807 ,  H01L29/7842 ,  Y10S438/938

    摘要： The present invention provides semiconductor structures and a method of fabricating such structures for application of MOSFET devices. The semiconductor structures are fabricated in such a way so that the layer structure in the regions of the wafer where n-MOSFETs are fabricated is different from the layer structure in regions of the wafers where p-MOSFETs are fabricated. The structures are fabricated by first forming a damaged region with a surface of a Si-containing substrate by ion implanting of a light atom such as He. A strained SiGe alloy is then formed on the Si-containing substrate containing the damaged region. An annealing step is then employed to cause substantial relaxation of the strained SiGe alloy via a defect initiated strain relaxation. Next, a strained semiconductor cap such as strained Si is formed on the relaxed SiGe alloy.

    摘要翻译： 本发明提供半导体结构和制造用于施加MOSFET器件的这种结构的方法。 以这样的方式制造半导体结构，使得制造n-MOSFET的晶片区域中的层结构不同于制造p-MOSFET的晶片的区域中的层结构。 通过首先通过离子注入诸如He的光原子形成具有含Si衬底的表面的损伤区域来制造结构。 然后在含有受损区域的含Si衬底上形成应变SiGe合金。 然后采用退火步骤通过缺陷引发的应变弛豫引起应变SiGe合金的显着松弛。 接下来，在弛豫的SiGe合金上形成诸如应变Si的应变半导体盖。