公开(公告)号：US20160197081A1

公开(公告)日：2016-07-07

申请号：US15072521

申请日：2016-03-17

申请人： Ki-Yeon Park ,  Jae-Hyoung CHOI ,  Vladimir URAZAEV ,  Jin-Ha JEONG

发明人： Ki-Yeon Park ,  Jae-Hyoung CHOI ,  Vladimir URAZAEV ,  Jin-Ha JEONG

IPC分类号： H01L27/108 ,  H01L21/283 ,  H01L49/02 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

摘要： Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

公开(公告)号：US20110102968A1

公开(公告)日：2011-05-05

申请号：US12838296

申请日：2010-07-16

申请人： Jae-Hyoung CHOI ,  Youn-Soo Kim ,  Jung-Hyeon Kim ,  Wan-Don Kim ,  Jae-Soon Lim ,  Sang-Yeol Kang

发明人： Jae-Hyoung CHOI ,  Youn-Soo Kim ,  Jung-Hyeon Kim ,  Wan-Don Kim ,  Jae-Soon Lim ,  Sang-Yeol Kang

IPC分类号： H01G4/008 ,  B32B9/04 ,  B05D5/12 ,  C23C14/34

CPC分类号： H01L23/5223 ,  H01L23/53261 ,  H01L28/56 ,  H01L28/91 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/518 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a multilayer structure and a method of forming the same, a conductive layer including a metal nitride and a dielectric layer positioned on a surface of the conductive layer and having a high dielectric constant. The metal nitride comprises one of niobium, vanadium and compositions thereof. Thus, the EOT and leakage current of the multilayer structure may be sufficiently improved.

摘要翻译： 在多层结构及其形成方法中，包括位于导电层表面上并具有高介电常数的金属氮化物和电介质层的导电层。 金属氮化物包括铌，钒及其组合物中的一种。 因此，可以充分提高多层结构的EOT和漏电流。

公开(公告)号：US20070026625A1

公开(公告)日：2007-02-01

申请号：US11460916

申请日：2006-07-28

申请人： Jung-Hee CHUNG ,  Jong-Cheol LEE ,  Jae-Hyoung CHOI ,  Jeong-Sik CHOI ,  Se-Hoon OH ,  Cha-Young YOO

发明人： Jung-Hee CHUNG ,  Jong-Cheol LEE ,  Jae-Hyoung CHOI ,  Jeong-Sik CHOI ,  Se-Hoon OH ,  Cha-Young YOO

IPC分类号： H01L21/473

CPC分类号： H01L21/02181 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/3142 ,  H01L21/3162 ,  H01L21/31645 ,  H01L28/91

摘要： In one embodiment, a method of fabricating a MIM capacitor includes forming an interlayer insulating layer having a contact plug on a semiconductor substrate, forming an etch stop layer on the interlayer insulating layer, and forming a mold layer having an opening exposing the contact plug on the etch stop layer. Next, a first conductive layer for the lower electrode is formed on the sidewalls and the bottom of the opening, and a photoresistive layer is formed on the first conductive layer. The mold layer and the photoresistive layer are then removed, and a composite dielectric layer is formed on the lower electrode. A second conductive layer is then formed on the composite dielectric layer. The composite dielectric layer may be composed of an oxide hafnium (HfO2) dielectric layer and an oxide aluminum (Al2O3) dielectric layer, with the oxide hafnium dielectric layer having a thickness of about 20 Å to about 50 Å. The oxide aluminum dielectric layer is formed with a thickness determined by subtracting the thickness of the oxide hafnium dielectric layer from a composite dielectric layer thickness corresponding to an equivalent oxide dielectric layer thickness set to provide a predetermined capacitance of the capacitor.

摘要翻译： 在一个实施例中，制造MIM电容器的方法包括在半导体衬底上形成具有接触插塞的层间绝缘层，在层间绝缘层上形成蚀刻停止层，并形成具有露出接触插头的开口的模具层 蚀刻停止层。 接下来，在开口的侧壁和底部形成用于下电极的第一导电层，并且在第一导电层上形成光刻胶层。 然后去除模具层和光致抗蚀剂层，并且在下部电极上形成复合电介质层。 然后在复合电介质层上形成第二导电层。 复合电介质层可以由氧化铪（HfO 2/2）介电层和氧化铝（Al 2 O 3 3）介电层 氧化铪介电层的厚度约为20至50埃。 形成氧化铝介电层，其厚度通过从设置为提供电容器的预定电容的等效氧化物介电层厚度对应的复合电介质层厚度减去氧化铪电介质层的厚度而确定。