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公开(公告)号:US08736053B2
公开(公告)日:2014-05-27
申请号:US13526821
申请日:2012-06-19
IPC分类号: H01L23/48
CPC分类号: H01L23/49816 , H01L21/4853 , H01L21/568 , H01L23/3135 , H01L25/105 , H01L2224/16225 , H01L2224/73253 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511
摘要: A circuit substrate having a mounting surface on which a semiconductor chip is mounted and at least one connection pad formed on the mounting surface is connected to a support plate having at least one mounting portion with a diameter larger than a diameter of the connection pad, through a truncated-cone-shaped solder layer which is formed from at least one solder ball on the basis of a difference between the diameter of the mounting portion and the diameter of the connection pad.
摘要翻译: 具有安装有半导体芯片的安装面的电路基板和形成在安装面上的至少一个连接焊盘连接到具有至少一个直径大于连接焊盘直径的安装部分的支撑板上,通过 基于安装部分的直径和连接焊盘的直径之间的差异,由至少一个焊球形成的截锥形焊料层。
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公开(公告)号:US07989707B2
公开(公告)日:2011-08-02
申请号:US11815580
申请日:2006-12-12
申请人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号: H05K1/16
CPC分类号: H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译: 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中,将半导体芯片封装在第一基板和第二基板之间,并且在第一布线和第二布线之间形成电连接,以形成连接到半导体芯片的多层布线。
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公开(公告)号:US08793868B2
公开(公告)日:2014-08-05
申请号:US13167203
申请日:2011-06-23
申请人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号: H05K3/30
CPC分类号: H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译: 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中,将半导体芯片封装在第一基板和第二基板之间,并且在第一布线和第二布线之间形成电连接,以形成连接到半导体芯片的多层布线。
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公开(公告)号:US20090008765A1
公开(公告)日:2009-01-08
申请号:US11815580
申请日:2006-12-12
申请人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人: Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
CPC分类号: H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译: 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中,将半导体芯片封装在第一基板和第二基板之间,并且在第一布线和第二布线之间形成电连接,以形成连接到半导体芯片的多层布线。
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公开(公告)号:US07827681B2
公开(公告)日:2010-11-09
申请号:US12137867
申请日:2008-06-12
申请人: Nobuyuki Kurashima , Tadashi Arai , Hajime Iizuka
发明人: Nobuyuki Kurashima , Tadashi Arai , Hajime Iizuka
CPC分类号: H05K1/144 , H01L21/565 , H01L23/3128 , H01L23/49833 , H01L23/5389 , H01L24/16 , H01L25/105 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/3511 , H05K3/284 , H05K2201/09063 , H05K2201/09136 , H05K2201/10674 , H05K2203/1178 , H05K2203/1316 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165 , Y10T29/49171 , Y10T29/49172 , H01L2924/00 , H01L2224/0401
摘要: There are provided the steps of mounting a semiconductor chip on a first substrate, providing an underfill resin between the semiconductor chip and the first substrate, forming a through hole on a second substrate, providing an electrode on the second substrate, bonding the first and second substrates to include the semiconductor chip through the electrode, and filling a sealing resin between the first and second substrates at a filling pressure capable of correcting a warpage generated on the semiconductor chip and the first substrate while discharging air from the through hole.
摘要翻译: 提供了将半导体芯片安装在第一基板上的步骤,在半导体芯片和第一基板之间提供底部填充树脂,在第二基板上形成通孔,在第二基板上提供电极,将第一和第二 基板通过电极包括半导体芯片,并且以能够校正半导体芯片和第一基板上产生的翘曲的填充压力填充第一和第二基板之间的密封树脂,同时从通孔排出空气。
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公开(公告)号:US20080307642A1
公开(公告)日:2008-12-18
申请号:US12137867
申请日:2008-06-12
申请人: Nobuyuki Kurashima , Tadashi Arai , Hajime Iizuka
发明人: Nobuyuki Kurashima , Tadashi Arai , Hajime Iizuka
IPC分类号: H05K3/30
CPC分类号: H05K1/144 , H01L21/565 , H01L23/3128 , H01L23/49833 , H01L23/5389 , H01L24/16 , H01L25/105 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/3511 , H05K3/284 , H05K2201/09063 , H05K2201/09136 , H05K2201/10674 , H05K2203/1178 , H05K2203/1316 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165 , Y10T29/49171 , Y10T29/49172 , H01L2924/00 , H01L2224/0401
摘要: There are provided the steps of mounting a semiconductor chip on a first substrate, providing an underfill resin between the semiconductor chip and the first substrate, forming a through hole on a second substrate, providing an electrode on the second substrate, bonding the first and second substrates to include the semiconductor chip through the electrode, and filling a sealing resin between the first and second substrates at a filling pressure capable of correcting a warpage generated on the semiconductor chip and the first substrate while discharging air from the through hole.
摘要翻译: 提供了将半导体芯片安装在第一基板上的步骤,在半导体芯片和第一基板之间提供底部填充树脂,在第二基板上形成通孔,在第二基板上提供电极,将第一和第二 基板通过电极包括半导体芯片,并且以能够校正半导体芯片和第一基板上产生的翘曲的填充压力填充第一和第二基板之间的密封树脂,同时从通孔排出空气。
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公开(公告)号:US07884484B2
公开(公告)日:2011-02-08
申请号:US11372916
申请日:2006-03-10
CPC分类号: H01L23/5383 , H01L21/563 , H01L21/6835 , H01L23/18 , H01L23/3128 , H01L23/49805 , H01L23/49816 , H01L23/5389 , H01L24/81 , H01L25/0655 , H01L2221/68345 , H01L2224/1134 , H01L2224/13144 , H01L2224/136 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/381 , H05K1/185 , H05K3/4644 , Y10T29/49126 , Y10T29/4913 , Y10T29/49135 , Y10T29/49155 , Y10T29/49156 , H01L2224/13099 , H01L2924/00 , H01L2224/0401
摘要: A wiring board includes an insulating layer in which a semiconductor chip is embedded, and a wiring structure connected to the semiconductor chip. A reinforcing member reinforcing the insulating layer is embedded in the insulating layer. This enables reduction in a thickness of the wiring board and a suppression of warpage of the wiring board.
摘要翻译: 布线基板包括嵌入有半导体芯片的绝缘层和与半导体芯片连接的布线结构。 加强绝缘层的加强构件嵌入在绝缘层中。 这样可以减少布线板的厚度和抑制布线板的翘曲。
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公开(公告)号:US20060208356A1
公开(公告)日:2006-09-21
申请号:US11372916
申请日:2006-03-10
IPC分类号: H01L23/48
CPC分类号: H01L23/5383 , H01L21/563 , H01L21/6835 , H01L23/18 , H01L23/3128 , H01L23/49805 , H01L23/49816 , H01L23/5389 , H01L24/81 , H01L25/0655 , H01L2221/68345 , H01L2224/1134 , H01L2224/13144 , H01L2224/136 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/381 , H05K1/185 , H05K3/4644 , Y10T29/49126 , Y10T29/4913 , Y10T29/49135 , Y10T29/49155 , Y10T29/49156 , H01L2224/13099 , H01L2924/00 , H01L2224/0401
摘要: A wiring board includes an insulating layer in which a semiconductor chip is embedded, and a wiring structure connected to the semiconductor chip. A reinforcing member reinforcing the insulating layer is embedded in the insulating layer. This enables reduction in a thickness of the wiring board and a suppression of warpage of the wiring board.
摘要翻译: 布线基板包括嵌入有半导体芯片的绝缘层和与半导体芯片连接的布线结构。 加强绝缘层的加强构件嵌入在绝缘层中。 这样可以减少布线板的厚度和抑制布线板的翘曲。
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公开(公告)号:US5960308A
公开(公告)日:1999-09-28
申请号:US40370
申请日:1998-03-18
IPC分类号: H01L21/60 , H01L23/31 , H01L23/485 , H01L23/528 , H01L23/532 , H01L23/552 , H01L21/44
CPC分类号: H01L24/12 , H01L23/3107 , H01L23/3114 , H01L23/5283 , H01L23/5329 , H01L23/53295 , H01L23/552 , H01L24/02 , H01L24/05 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/05572 , H01L2224/1134 , H01L2224/131 , H01L2224/13144 , H01L2224/16 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15787 , H01L2924/19041 , H01L2924/3025
摘要: A process for making a chip sized semiconductor device, in which a semiconductor chip is prepared so as to have electrodes on one of surfaces thereof and an electrically insulating passivation film formed on the one surface except for areas where the electrodes exist. An insulation sheet is prepared so as to have first and second surfaces and a metallic film coated on the first surface. The second surface of the insulation sheet is adhered on the one surface of the semiconductor chip. First via-holes are provided in the metallic film at positions corresponding to the electrodes. Second via-holes are provided in the insulation sheet at positions corresponding to the first via-holes so that the electrodes are exposed. The metallic film is electrically connected to the electrodes of the semiconductor chip through the first and second via-holes. A circuit pattern is formed from the metallic film so that the circuit pattern has external terminal connecting portions. An insulation film is adhered on the insulation sheet so that the external terminal connecting portions are exposed. External connecting terminals are electrically connected to the external terminal connecting portions of the circuit pattern.
摘要翻译: 制造芯片尺寸的半导体器件的方法,其中制备半导体芯片以在其一个表面上具有电极,以及形成在除了存在电极的区域之外的一个表面上的电绝缘钝化膜。 制备绝缘片以具有第一表面和第二表面以及涂覆在第一表面上的金属膜。 绝缘片的第二表面粘附在半导体芯片的一个表面上。 在与电极对应的位置处,在金属膜上设置有第一通路孔。 在绝缘片上设置有与第一通路孔对应的位置露出第二通孔。 金属膜通过第一和第二通孔与半导体芯片的电极电连接。 电路图案由金属膜形成,使得电路图案具有外部端子连接部分。 绝缘膜粘附在绝缘片上,使得外部端子连接部分露出。 外部连接端子电连接到电路图案的外部端子连接部分。
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公开(公告)号:US5538985A
公开(公告)日:1996-07-23
申请号:US377236
申请日:1995-01-24
申请人: Hajime Iizuka , Takahisa Oguchi , Yoji Aoki , Norio Ohto , Kazutoshi Horikomi , Takaichi Miwa , Takeshi Kamioka , Shoji Kawashima
发明人: Hajime Iizuka , Takahisa Oguchi , Yoji Aoki , Norio Ohto , Kazutoshi Horikomi , Takaichi Miwa , Takeshi Kamioka , Shoji Kawashima
IPC分类号: C07D207/26 , C07D401/06 , A61K31/395 , C07D403/02
CPC分类号: C07D207/26 , C07D401/06
摘要: Antipsychotics and ischemic cerebral disease therapeutics comprising as an effective ingredient a compound represented by the following formula (1) or (2): ##STR1## or a salt thereof. These drugs do not induce extrapyramidal side effects.
摘要翻译: 抗精神病药和缺血性脑病治疗剂,其包含作为有效成分的由下式(1)或(2)表示的化合物或其盐。 这些药物不会引起锥体外系的副作用。
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