Variants of traf2 which act as an inhibitor of tnf-alpha (tnfα) signaling pathway
    3.
    发明授权
    Variants of traf2 which act as an inhibitor of tnf-alpha (tnfα) signaling pathway 失效
    作为tnf-α(tnfalpha)信号通路抑制剂的traf2变体

    公开(公告)号:US06998475B1

    公开(公告)日:2006-02-14

    申请号:US10018030

    申请日:2000-04-06

    CPC分类号: C07K14/705 C07K14/4703

    摘要: The present invention relates to variants of TRAF2 which demonstrate the ability to inhibit the TNF α signaling path-way. In particular, applicants have isolated a splice variant of TRAF2 referred to hereinafter as “TRAF2 truncated” or “TRAF2TR” and a TRAF2 expression construct with enhanced dominant negative properties, hereafter referred to as “TRAF2 truncated-deleted” or “TRAF2TD”. Both TRAF2TR and TRAF2TD have the ability to inhibit the TNF α signaling pathway and in TRAF2TD, this ability is greatly enhanced, greatly reducing the response to TNF α binding.

    摘要翻译: 本发明涉及TRAF2的变体,其表现出抑制TNFα信号传导途径的能力。 特别地,申请人已经分离了以下称为“TRAF2截短”或“TRAF2TR”的TRAF2和具有增强的显性阴性的TRAF2表达构建体(以下称为“TRAF2截短缺失”或“TRAF2TD”)的剪接变体。 TRAF2TR和TRAF2TD均具有抑制TNFα信号通路的能力,并且在TRAF2TD中,这种能力大大增强,大大降低了对TNFα结合的反应。

    Variants of TRAF2 which act as an inhibitor of TNF-alpha (TNFα) signaling pathway
    4.
    发明授权
    Variants of TRAF2 which act as an inhibitor of TNF-alpha (TNFα) signaling pathway 失效
    作为TNF-α(TNFalpha)信号通路抑制剂的TRAF2的变体

    公开(公告)号:US07332593B2

    公开(公告)日:2008-02-19

    申请号:US11294246

    申请日:2005-12-05

    IPC分类号: C12N5/10 C12N15/12 C12N15/63

    CPC分类号: C07K14/705 C07K14/4703

    摘要: The present invention relates to variants of TRAF2 which demonstrate the ability to inhibit the TNF α signaling pathway. In particular, applicants have isolated a splice variant of TRAF2 referred to hereinafter as “TRAF2 truncated” or “TRAF2TR” and a TRAF2 expression construct with enhanced dominant negative properties, hereafter referred to as “TRAF2 truncated-deleted” or “TRAF2TD”. Both TRAF2TR and TRAF2TD have the ability to inhibit the TNF α signaling pathway and in TRAF2TD, this ability is greatly enhanced, greatly reducing the response to TNF α binding.

    摘要翻译: 本发明涉及TRAF2的变体,其表现出抑制TNFα信号通路的能力。 特别地,申请人已经分离了以下称为“TRAF2截短”或“TRAF2TR”的TRAF2和具有增强的显性阴性的TRAF2表达构建体(以下称为“TRAF2截短缺失”或“TRAF2TD”)的剪接变体。 TRAF2TR和TRAF2TD均具有抑制TNFα信号通路的能力,并且在TRAF2TD中,这种能力大大增强,大大降低了对TNFα结合的反应。

    Process of forming a semiconductor memory cell with continuous
polysilicon run circuit elements
    8.
    发明授权
    Process of forming a semiconductor memory cell with continuous polysilicon run circuit elements 失效
    形成具有连续多晶硅运行电路元件的半导体存储单元的工艺

    公开(公告)号:US4214917A

    公开(公告)日:1980-07-29

    申请号:US876726

    申请日:1978-02-10

    摘要: A process is described for forming a plurality of polysilicon runs on the surface of a semiconductor substrate, such as a silicon substrate, at least one of the polysilicon runs having a resistor portion formed therein, and at least one of the polysilicon runs forming the conductive gate electrode of a self-aligned insulated silicon gate field effect device. A specific embodiment of the process involves forming protective oxide layer on the substrate with depressions or wells therein to define active area regions of field effect devices, depositing a layer of polysilicon to overly the protective oxide layers, implanting dopant ions in the polysilicon layer to establish an initial conductivity of the polysilicon corresponding to resistor material, patterning the polysilicon layer to define desired polysilicon runs, with at least one of the polysilicon runs traversing across the gate region and gate oxide of a field effect device to serve as the gate electrode thereof; establishing an oxide layer over the surface and then removing oxide to both expose the active areas of the field effect devices where not protected by the polysilicon gate electrodes and also to define a remaining resistor mask of the oxide which overlies and protects the resistor portions of the polysilicon runs; and applying dopant to render the unprotected portions of the polysilicon runs highly conductive relative to the oxide masked resistor portions thereof and to simultaneously dope the exposed active areas of field effect devices.

    摘要翻译: 描述了在诸如硅衬底的半导体衬底的表面上形成多个多晶硅延伸的工艺,其中形成有电阻器部分的多晶硅行程中的至少一个,并且至少一个多晶硅流程形成导电 自对准绝缘硅栅场效应器件的栅电极。 该方法的具体实施方案包括在衬底上形成保护性氧化物层,其中具有凹陷或凹槽,以限定场效应器件的有源区域,将多晶硅层沉积在过度的保护氧化物层上,在多晶硅层中注入掺杂剂离子以建立 形成与电阻材料相对应的多晶硅的初始电导率,图案化多晶硅层以限定期望的多晶硅延伸,其中至少一个多晶硅延伸穿过栅极区域和场效应器件的栅极氧化物以用作其栅电极; 在表面上建立氧化物层,然后去除氧化物,以暴露不受多晶硅栅电极保护的场效应器件的有源区,并且还限定氧化物的剩余电阻掩模,其覆盖并保护 多晶硅运行; 并且施加掺杂剂以使得多晶硅的未受保护部分相对于其氧化物掩模的电阻器部分高度导电,并且同时掺杂暴露的场效应器件的有源区域。