OPTICAL HYBRID MODULE
    1.
    发明申请
    OPTICAL HYBRID MODULE 审中-公开
    光学混合模块

    公开(公告)号:US20080285978A1

    公开(公告)日:2008-11-20

    申请号:US12053694

    申请日:2008-03-24

    IPC分类号: H04B10/00

    摘要: Provided is an optical hybrid module in which an optical device, a filter, an amplifier and an antenna are hybrid-integrated, which includes: a silicon optical bench disposed on a substrate and having an optical fiber and an optical device; an amplifier disposed on the substrate and connected to the optical device disposed on the silicon optical bench to amplify a signal transmitted from the optical device; and an antenna disposed on the substrate to be connected to the amplifier and transmitting a signal amplified by the amplifier. Thus, a foot-print module may be embodied by disposing an antenna and a filter on a single- or multi-layer substrate and providing a bias required for the optical device and the amplifier through a solder ball. Also, due to the antenna and filter disposed on the substrate, an expensive connector is not needed, and thus a production costs can be reduced.

    摘要翻译: 提供了一种光混合模块,其中光学装置,滤波器,放大器和天线是混合集成的,其包括:设置在基板上并具有光纤和光学装置的硅光学台; 放大器,设置在所述基板上并连接到设置在所述硅光学台上的所述光学装置,以放大从所述光学装置发送的信号; 以及设置在所述基板上以连接到所述放大器并且发射由所述放大器放大的信号的天线。 因此,可以通过在单层或多层衬底上设置天线和滤波器并通过焊球提供光学器件和放大器所需的偏置来实现脚印模块。 此外,由于设置在基板上的天线和滤波器,不需要昂贵的连接器,因此可以降低生产成本。

    WAFER LEVEL PACKAGE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    WAFER LEVEL PACKAGE AND METHOD OF FABRICATING THE SAME 有权
    WAFER LEVEL PACKAGE及其制作方法

    公开(公告)号:US20090261481A1

    公开(公告)日:2009-10-22

    申请号:US12208512

    申请日:2008-09-11

    IPC分类号: H01L23/52 H01L21/66 H01L21/00

    摘要: Provided are a wafer level package in which a communication line can be readily formed between an internal device and the outside of the package, and a method of fabricating the wafer level package. The wafer level package includes a first substrate having a cavity in which a first internal device is disposed, an Input/Output (I/O) pad formed on the first substrate and electrically connected with the first internal device, a second substrate disposed over the first substrate and from which a part corresponding to the I/O pad is removed, and a solder bonding the first and second substrates. According to the wafer level package and the method of fabricating the same, upper and lower substrates are sawed to different cutting widths, or a hole is formed in the upper substrate, such that a communication line of an internal device can be readily formed without a via process which penetrates a substrate. Therefore, in comparison with a conventional wafer level package fabricated using the via process, it is possible to simplify a fabrication process and reduce production cost.

    摘要翻译: 提供了一种晶片级封装,其中可以容易地在内部器件和封装外部之间形成通信线,以及制造晶片级封装的方法。 晶片级封装包括具有第一内部器件的空腔的第一衬底,形成在第一衬底上并与第一内部器件电连接的输入/输出(I / O)焊盘,设置在第一衬底上的第二衬底 第一衬底并且从其中除去对应于I / O焊盘的部分,以及焊接第一和第二衬底的焊料。 根据晶片级封装及其制造方法,上下基板被切割成不同的切割宽度,或者在上基板上形成孔,使得可以容易地形成内部装置的连通线,而不需要 穿过基底的过程。 因此,与使用通孔工艺制造的常规晶片级封装相比,可以简化制造工艺并降低生产成本。

    Wafer level package and method of fabricating the same
    3.
    发明授权
    Wafer level package and method of fabricating the same 有权
    晶圆级封装及其制造方法

    公开(公告)号:US07985697B2

    公开(公告)日:2011-07-26

    申请号:US12208512

    申请日:2008-09-11

    IPC分类号: H01L21/31

    摘要: Provided are a wafer level package in which a communication line can be readily formed between an internal device and the outside of the package, and a method of fabricating the wafer level package. The wafer level package includes a first substrate having a cavity in which a first internal device is disposed, an Input/Output (I/O) pad formed on the first substrate and electrically connected with the first internal device, a second substrate disposed over the first substrate and from which a part corresponding to the I/O pad is removed, and a solder bonding the first and second substrates. According to the wafer level package and the method of fabricating the same, upper and lower substrates are sawed to different cutting widths, or a hole is formed in the upper substrate, such that a communication line of an internal device can be readily formed without a via process which penetrates a substrate. Therefore, in comparison with a conventional wafer level package fabricated using the via process, it is possible to simplify a fabrication process and reduce production cost.

    摘要翻译: 提供了一种晶片级封装,其中可以容易地在内部器件和封装外部之间形成通信线,以及制造晶片级封装的方法。 晶片级封装包括具有第一内部器件的空腔的第一衬底,形成在第一衬底上并与第一内部器件电连接的输入/输出(I / O)焊盘,设置在第一衬底上的第二衬底 第一衬底并且从其中除去对应于I / O焊盘的部分,以及焊接第一和第二衬底的焊料。 根据晶片级封装及其制造方法,上下基板被切割成不同的切割宽度,或者在上基板上形成孔,使得可以容易地形成内部装置的连通线,而不需要 穿过基底的过程。 因此,与使用通孔工艺制造的常规晶片级封装相比,可以简化制造工艺并降低生产成本。

    Digital receiver
    5.
    发明授权
    Digital receiver 有权
    数字接收机

    公开(公告)号:US08509353B2

    公开(公告)日:2013-08-13

    申请号:US12818510

    申请日:2010-06-18

    IPC分类号: H03K9/00

    CPC分类号: H04B1/0025 H04B1/001

    摘要: In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.

    摘要翻译: 在数字接收机中,噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器,对模拟信号进行放大和频带滤波,并衰减白噪声和除频带信号之外的干扰信号。 ADC在期望信号的载波频率上执行子采样,并通过使用采样频率对已经通过噪声衰减和信号幅度映射可变放大单元的模拟信号进行数字信号的期望信号的频带上的过采样, 的直接转换频带或中频带。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。 数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号,并通过数字调节增益来处理数字信号。

    PROGRAMMABLE COMPLEX MIXER
    7.
    发明申请
    PROGRAMMABLE COMPLEX MIXER 审中-公开
    可编程复合混合器

    公开(公告)号:US20130063199A1

    公开(公告)日:2013-03-14

    申请号:US13615423

    申请日:2012-09-13

    IPC分类号: G06G7/14

    CPC分类号: H03D7/165

    摘要: Disclosed is a programmable complex mixer. In accordance with the embodiments of the present invention, it is possible to control an output by programming paths and signs of internal signals in a complex mixer to reduce a processing bandwidth, power consumption, and a chip area in a transceiver, thereby improving performance of a transceiver.

    摘要翻译: 公开了一种可编程复合混合器。 根据本发明的实施例,可以通过在复合混频器中编程内部信号的路径和符号来控制输出,以减少收发器中的处理带宽,功耗和芯片面积,从而提高 收发器

    Digital RF converter and RF converting method thereof
    8.
    发明授权
    Digital RF converter and RF converting method thereof 有权
    数字RF转换器及其RF转换方法

    公开(公告)号:US08217818B2

    公开(公告)日:2012-07-10

    申请号:US12902125

    申请日:2010-10-11

    IPC分类号: H03M1/66

    CPC分类号: H03M3/504 H03M3/32

    摘要: Provided are a digital radio frequency (RF) converter and an RF converting method thereof. The RF frequency converter includes first and second RF output terminals of a differential form outputting an RF signal; a differential switch selectively connecting first and second nodes into the first and second RF output terminals in response to an oscillating waveform; at least one digital delay device column outputting a plurality of unit bits by sequentially delaying an input bit corresponding to the digital input signal; a front-end processor summing an output of the at least one digital delay device column; a plurality of current sources; and a plurality of first switches corresponding to the plurality of current sources, respectively, and delivering currents of current sources whose number corresponds to the sum value of the front-end processor among the plurality of current sources, to one of the first and second nodes.

    摘要翻译: 提供一种数字射频(RF)转换器及其RF转换方法。 RF频率转换器包括输出RF信号的差分形式的第一和第二RF输出端; 差分开关响应于振荡波形选择性地将第一和第二节点连接到第一和第二RF输出端子中; 至少一个数字延迟装置列通过顺序地延迟对应于数字输入信号的输入位而输出多个单位位; 前端处理器对所述至少一个数字延迟装置列的输出求和; 多个电流源; 以及分别对应于多个电流源的多个第一开关,并将数量对应于多个电流源中的前端处理器的和值的电流源的电流传送到第一和第二节点之一 。

    Method and device for digitally correcting DC offset
    9.
    发明授权
    Method and device for digitally correcting DC offset 有权
    数字校正直流偏移的方法和装置

    公开(公告)号:US08164494B2

    公开(公告)日:2012-04-24

    申请号:US12628186

    申请日:2009-11-30

    IPC分类号: H03M1/06

    CPC分类号: H03F3/005

    摘要: There is provided a digital Direct Current (DC) offset correction method and device. The device includes a digital-analog converter charging a load capacitor according to an input code value and generating an initial voltage value of the load capacitor; a comparator comparing an output DC offset value of a discrete-time amplifier and filter on the basis of the initial voltage value with a preset output DC offset value when the discrete-time amplifier and filter and the load capacitor are connected to each other; and a controller changing the input code value of the digital-analog converter according to comparison result of the comparator.

    摘要翻译: 提供了数字直流(DC)偏移校正方法和装置。 该装置包括数模转换器,根据输入代码值对负载电容器充电并产生负载电容器的初始电压值; 当离散时间放大器和滤波器和负载电容器彼此连接时,比较器将基于初始电压值的离散时间放大器和滤波器的输出DC偏移值与预设输出DC偏移值进行比较; 以及根据比较器的比较结果改变数模转换器的输入代码值的控制器。

    Frequency synthesizer
    10.
    发明授权
    Frequency synthesizer 有权
    频率合成器

    公开(公告)号:US08115525B2

    公开(公告)日:2012-02-14

    申请号:US12626554

    申请日:2009-11-25

    IPC分类号: H03L7/06

    摘要: There is provided a frequency synthesizer. The frequency synthesizer includes a frequency oscillator adjusting an output frequency according to a control bit; a programmable divider having a preset minimum division ratio, the programming divider dividing the output frequency of the frequency oscillator at a variable division ratio; a counter unit receiving an output signal of the programmable divider and a reference frequency to generate a count value by counting rising edges of the output signal of the programmable divider during one cycle of the reference frequency, and outputting a first hit signal when the count value is 1, and outputting a second hit signal when the count value is 2; and a phase detection unit outputting a control bit obtained by subtracting a fractional error of the output signal of the programmable divider from a fractional error at a locked phase obtained from the count value and the reference frequency.

    摘要翻译: 提供了一个频率合成器。 频率合成器包括根据控制位调节输出频率的频率振荡器; 具有预设的最小分频比的可编程分频器,所述编程分频器以可分分频比划分所述频率振荡器的输出频率; 接收可编程分频器的输出信号的计数器单元和参考频率,以在参考频率的一个周期期间对可编程分频器的输出信号的上升沿进行计数以产生计数值,并且当计数值 是1,并且当计数值为2时输出第二命中信号; 以及相位检测单元,输出通过从从计数值和参考频率获得的锁定相位的分数误差中减去可编程分频器的输出信号的分数误差而获得的控制位。