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1.发明授权公开(公告)号：US07718231B2
公开(公告)日：2010-05-18
申请号：US10674647
申请日：2003-09-30
IPC分类号： C23C14/10 , C23C14/48 , C23C14/58 , H01L21/762
CPC分类号： H01L21/76243 , H01L21/26533 , H01L21/3063 , H01L21/31662
摘要： A method of fabricating silicon-on-insulators (SOIs) having a thin, but uniform buried oxide region beneath a Si-containing over-layer is provided. The SOI structures are fabricated by first modifying a surface of a Si-containing substrate to contain a large concentration of vacancies or voids. Next, a Si-containing layer is typically, but not always, formed atop the substrate and then oxygen ions are implanted into the structure utilizing a low-oxygen dose. The structure is then annealed to convert the implanted oxygen ions into a thin, but uniform thermal buried oxide region.
摘要翻译： 提供了一种制造在含Si的上层下方具有薄而均匀的掩埋氧化物区域的硅绝缘体（SOI）的方法。 通过首先修饰含Si衬底的表面以包含大量的空位或空隙的浓度来制造SOI结构。 接下来，含硅层通常但不总是形成在衬底顶上，然后使用低氧剂量将氧离子注入到结构中。 然后将结构退火以将注入的氧离子转化成薄但均匀的热掩埋氧化物区域。
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公开(公告)号：US07566482B2
公开(公告)日：2009-07-28
申请号：US10674648
申请日：2003-09-30
IPC分类号： C23C14/48 , C23C14/08 , C23C14/58 , H01L21/265 , H01L21/316
CPC分类号： H01L21/76245 , C25F3/04
摘要： A method in which a SOI substrate structure is fabricated by oxidation of graded porous Si is provided. The graded porous Si is formed by first implanting a dopant (p- or n-type) into a Si-containing substrate, activating the dopant using an activation anneal step and then anodizing the implanted and activated dopant region in a HF-containing solution. The graded porous Si has a relatively coarse top layer and a fine porous layer that is buried beneath the top layer. Upon a subsequent oxidation step, the fine buried porous layer is converted into a buried oxide, while the coarse top layer coalesces into a solid Si-containing over-layer by surface migration of Si atoms.
摘要翻译： 提供了通过分级多孔Si的氧化制造SOI衬底结构的方法。 通过首先将掺杂剂（p型或n型）注入到含Si衬底中，使用激活退火步骤激活掺杂剂，然后对含HF溶液中的注入和活化的掺杂剂区进行阳极化，形成渐变多孔Si。 分级多孔Si具有相对粗糙的顶层和埋在顶层下方的细多孔层。 在随后的氧化步骤中，精细埋入的多孔层被转化为掩埋氧化物，而粗顶层通过Si原子的表面迁移而结合成固体含Si的超层。
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公开(公告)号：US06878611B2
公开(公告)日：2005-04-12
申请号：US10336147
申请日：2003-01-02
IPC分类号： H01L21/76 , H01L21/02 , H01L21/20 , H01L21/324 , H01L21/762 , H01L21/8238 , H01L27/12 , H01L21/36
CPC分类号： H01L21/324 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02658 , H01L21/02694 , H01L21/823807 , Y10S438/96
摘要： In the preferred embodiment of this invention a method is described to convert patterned SOI regions into patterned SGOI (silicon-germanium on oxide) by the SiGe/SOI thermal mixing process to further enhance performance of the logic circuit in an embedded DRAM. The SGOI region acts as a template for subsequent Si growth such that the Si is strained, and electron and holes in the Si have higher mobility.
摘要翻译： 在本发明的优选实施例中，描述了通过SiGe / SOI热混合工艺将图案化SOI区域转换为图案化SGOI（氧化硅上的硅 - 锗）的方法，以进一步增强嵌入式DRAM中逻辑电路的性能。 SGOI区域用作随后的Si生长的模板，使得Si被应变，并且Si中的电子和空穴具有较高的迁移率。
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4.发明授权Formation of a silicon germanium-on-insulator structure by oxidation of a buried porous silicon layer 失效通过掩埋多孔硅层的氧化形成绝缘体上硅结构的结构公开(公告)号：US07125458B2
公开(公告)日：2006-10-24
申请号：US10662028
申请日：2003-09-12
IPC分类号： H01L21/20
CPC分类号： H01L21/76227 , C22F1/10 , H01L21/02378 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02667 , H01L21/76245 , H01L29/78603
摘要： A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.
摘要翻译： 提供一种形成依赖于在含Ge层下形成的多孔硅层（或区域）的氧化的绝缘体上硅的简单且直接的方法。 该方法包括以下步骤：提供包括其中形成有富空穴的含Si衬底和含Si衬底顶部的含Ge层的结构; 将富含孔的区域转化为多孔区域; 并退火包括多孔区域的结构，以提供基本上松弛的绝缘体上的SiGe。
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5.发明授权Formation of patterned silicon-on-insulator (SOI)/silicon-on-nothing (SON) composite structure by porous Si engineering 有权通过多孔Si工程形成图案化的绝缘体上硅（SOI）/无硅（SON）复合结构公开(公告)号：US06800518B2
公开(公告)日：2004-10-05
申请号：US10334220
申请日：2002-12-30
申请人： Robert E. Bendernagel , Kwang Su Choe , Bijan Davari , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi , Sandip Tiwari
发明人： Robert E. Bendernagel , Kwang Su Choe , Bijan Davari , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi , Sandip Tiwari
IPC分类号： H01L318234
CPC分类号： H01L21/324 , H01L21/76243
摘要： A patterned SOI/SON composite structure and methods of forming the same are provided. In the SOI/SON composite structure, the patterned SOI/SON structures are sandwiched between a Si over-layer and a semiconductor substrate. The method of forming the patterned SOI/SON composite structure includes shared processing steps wherein the SOI and SON structure are formed together. The present invention also provides a method of forming a composite structure which includes buried conductive/SON structures as well as a method of forming a composite structure including only buried void planes.
摘要翻译： 提供了图案化的SOI / SON复合结构及其形成方法。 在SOI / SON复合结构中，图案化SOI / SON结构夹在Si上层和半导体衬底之间。 形成图案化SOI / SON复合结构的方法包括共同的处理步骤，其中SOI和SON结构形成在一起。 本发明还提供一种形成复合结构的方法，该复合结构包括掩埋导电/ SON结构以及形成仅包括掩埋空隙平面的复合结构的方法。
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公开(公告)号：US09331220B2
公开(公告)日：2016-05-03
申请号：US13173097
申请日：2011-06-30
IPC分类号： H01L31/0236 , H01L31/0352 , H01L31/02 , H01L31/075 , H01L31/18 , H01L31/0224
CPC分类号： H01L31/02366 , H01L31/022483 , H01L31/02363 , H01L31/035281 , H01L31/03529 , H01L31/03762 , H01L31/075 , H01L31/077 , H01L31/1804 , H01L31/1888 , Y02E10/50
摘要： A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack.
摘要翻译： 一种光电器件和方法包括在衬底中形成多个柱结构，在柱结构上形成第一电极层，并在第一衬底上形成包括N型层，P型层和本征层的连续光伏堆叠 电极。 第二电极层沉积在光伏堆叠上，使得在柱结构之间的第二电极层中出现间隙或裂缝。 湿蚀刻第二电极层以打开间隙或裂缝并且减小第二电极层以在光伏堆叠上形成基本上均匀厚度的三维电极。
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公开(公告)号：US09214577B2
公开(公告)日：2015-12-15
申请号：US13407006
申请日：2012-02-28
IPC分类号： H01L31/0224 , H01L31/0232 , H01L31/075 , H01L31/18
CPC分类号： H01L31/03767 , H01L31/022466 , H01L31/075 , H01L31/1804 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer.
摘要翻译： 形成光伏器件的方法包括在透明电极和p型层之间形成缓冲层。 缓冲层包括基本上落在形成在透明电极和p型层之间的屏障的中间的功函数，以提供对光诱导的降解更大的阻力。 在p型层上形成本征层和n型层。
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公开(公告)号：US20140000685A1
公开(公告)日：2014-01-02
申请号：US13544415
申请日：2012-07-09
IPC分类号： H01L31/02
CPC分类号： H01L31/022425 , H01L31/03921 , H01L31/075 , H01L31/1864 , Y02E10/548 , Y02P70/521
摘要： A photovoltaic device includes one or more layers of a photovoltaic stack formed on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Reduced defect zones are disposed adjacent to contact regions in portions of the photovoltaic cell and are formed by an anneal configured to improve overall performance.
摘要翻译： 光伏器件包括通过采用高沉积速率等离子体增强化学气相沉积（HDR PECVD）工艺在衬底上形成的一层或多层光伏叠层。 在光伏堆叠上形成触点以提供光伏电池。 减少的缺陷区设置在光伏电池部分的接触区域附近，并且通过被配置成改善整体性能的退火形成。
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公开(公告)号：US20130221464A1
公开(公告)日：2013-08-29
申请号：US13407006
申请日：2012-02-28
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L31/03767 , H01L31/022466 , H01L31/075 , H01L31/1804 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer.
摘要翻译： 形成光伏器件的方法包括在透明电极和p型层之间形成缓冲层。 缓冲层包括基本上落在形成在透明电极和p型层之间的屏障的中间的功函数，以提供对光诱导的降解更大的阻力。 在p型层上形成本征层和n型层。
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公开(公告)号：US20130126493A1
公开(公告)日：2013-05-23
申请号：US13302427
申请日：2011-11-22
申请人： Stephen W. Bedell , Cheng-Wei Cheng , Keith E. Fogel , Devendra K. Sadana , Katherine L. Saenger , Norma E. Sosa Cortes , Ning Li , Ibrahim Alhomoudi
发明人： Stephen W. Bedell , Cheng-Wei Cheng , Keith E. Fogel , Devendra K. Sadana , Katherine L. Saenger , Norma E. Sosa Cortes , Ning Li , Ibrahim Alhomoudi
IPC分类号： B23K26/00
CPC分类号： H01L21/268 , B23K26/0624 , B23K26/364 , B23K26/40 , B23K2103/50 , H01L21/31127 , H01L21/32131 , H01L21/6835 , H01L2221/68327
摘要： Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled.
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