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1.发明授权公开(公告)号：US11816406B2
公开(公告)日：2023-11-14
申请号：US17338266
申请日：2021-06-03
Applicant: LegUp Computing Inc.
Inventor： Jongsok Choi , Ruolong Lian , Andrew Christopher Canis , Jason Helge Anderson , Muhammad R. Soliman
IPC: G06F30/327 , G06F13/16 , G06F30/3312
CPC classification number: G06F30/327 , G06F13/1673 , G06F30/3312
Abstract: A computer-implemented method for synthesizing a digital circuit is disclosed. The method includes receiving a multi-threaded software program with at least one C++ thread; generating a register-transfer level (RTL) hardware description of the at least one C++ thread; and automatically inferring generation of parallel hardware RTL in response to receiving the at least one C++ thread.
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2.发明申请
公开(公告)号：US20210294948A1
公开(公告)日：2021-09-23
申请号：US17338266
申请日：2021-06-03
Applicant: LegUp Computing Inc.
Inventor： Jongsok Choi , Ruolong Lian , Andrew Christopher Canis , Jason Helge Anderson , Muhammad R. Soliman
IPC: G06F30/327 , G06F13/16 , G06F30/3312
Abstract: A computer-implemented method for synthesizing a digital circuit is disclosed. The method includes receiving a multi-threaded software program with at least one C++ thread; generating a register-transfer level (RTL) hardware description of the at least one C++ thread; and automatically inferring generation of parallel hardware RTL in response to receiving the at least one C++ thread.
