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    Voltage-reducing device with low power dissipation
    3.
    发明授权
    Voltage-reducing device with low power dissipation 有权
    具有低功耗的降压装置

    公开(公告)号：US6014018A

    公开(公告)日：2000-01-11

    申请号：US177205

    申请日：1998-10-22

    申请人： Te-Sun Wu ,  Hui-Fang Tsai ,  Tsun-Zu Lin

    发明人： Te-Sun Wu ,  Hui-Fang Tsai ,  Tsun-Zu Lin

    IPC分类号： G05F3/24 ,  G05F1/40

    CPC分类号： G05F3/242

    摘要： A voltage-reducing device of low power dissipation is provided, including a plurality of transistors, which are self-connected as diode equivalent. These transistors are then cascaded in series in the same direction and coupled to a voltage source. Since every transistor has a threshold voltage, the voltage at the end of the forward-biased cascaded transistors will be lowered than the voltage source so as to provide a reduced voltage source. Furthermore, since the voltage adjustment of the device is based on the threshold voltage, there is hardly any power dissipation. In addition, we can use different threshold voltages from various transistors to provide different combinations of these threshold voltages to obtain the desired voltage drop.

    摘要翻译： 提供低功耗的降压装置，包括多个晶体管，它们作为二极管等效自连接。 然后将这些晶体管以相同的方向串联级联并耦合到电压源。 由于每个晶体管都具有阈值电压，所以正向偏置级联晶体管末端的电压将比电压源降低，从而提供一个降低的电压源。 此外，由于器件的电压调整基于阈值电压，因此几乎不存在功率消耗。 此外，我们可以使用不同晶体管的不同阈值电压来提供这些阈值电压的不同组合，以获得所需的电压降。

    No leak steam iron
    4.
    发明授权
    No leak steam iron 失效
    无泄漏蒸汽熨斗

    公开(公告)号：US4688339A

    公开(公告)日：1987-08-25

    申请号：US934266

    申请日：1986-11-24

    申请人： Hui-Fang Tsai

    发明人： Hui-Fang Tsai

    IPC分类号： D06F75/14 ,  D06F75/18 ,  D06F79/02 ,  D06F75/28 ,  D06F75/34 ,  D06F75/40

    CPC分类号： D06F79/02 ,  D06F75/14 ,  D06F75/18 ,  D06F79/026

    摘要： A stream iron includes a support base, a handle, a reservoir portion which has an elbow-like water entry tube for preventing water stored inside the reservoir portion from spilling out when the steam iron is tilted forward, and an ironing plate having a bi-metallic plate. A related arrangement prevents water from flowing out of the ironing plate and getting clothes being ironed wet after the steam button has been pressed if the temperature of the ironing plate is lower than a certain minimum value.

    摘要翻译： 流铁包括支撑基座，手柄，储存器部分，其具有肘形的入水管，用于防止储存部分中储存的水在蒸汽熨斗向前倾斜时溢出;以及熨烫板， 金属板。 如果熨烫板的温度低于一定的最小值，则在按压蒸汽按钮之后，防止水从熨烫板流出并使得熨烫的衣服变湿。

    Non-Volatile Memory Cell and Layout Structure of Non-Volatile Memory Device
    5.
    发明申请
    Non-Volatile Memory Cell and Layout Structure of Non-Volatile Memory Device 有权
    非易失性存储器单元和非易失性存储器件的布局结构

    公开(公告)号：US20110073924A1

    公开(公告)日：2011-03-31

    申请号：US12568953

    申请日：2009-09-29

    申请人： Hung-Lin SHIH ,  Bin Chen, JR. ,  Pei-Ching Yin ,  Hui-Fang Tsai

    发明人： Hung-Lin SHIH ,  Bin Chen, JR. ,  Pei-Ching Yin ,  Hui-Fang Tsai

    IPC分类号： H01L29/94

    CPC分类号： H01L27/0207 ,  H01L27/11519 ,  H01L27/11558 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory cell includes a semiconductor substrate with isolation structures formed therein and thereby transistor region and capacitor region are defined therein. A conductor is disposed over the isolation structures, the transistor region and a first-type doped well disposed in the capacitor region. The conductor includes a capacitor portion disposed over the first-type doped well, a transistor portion disposed over the transistor region, a first edge disposed over the isolation structure at a side of the transistor region, and an opposite second edge disposed over the first-type doped well. Two first ion doped wells are disposed in the transistor region and respectively at two sides of the transistor portion, and constitutes a transistor with the transistor portion. A second ion doped region is disposed in the capacitor region excluding the conductor and constitutes a capacitor with the capacitor portion.

    摘要翻译： 非易失性存储单元包括其中形成有隔离结构的半导体衬底，由此在其中限定晶体管区域和电容器区域。 导体设置在隔离结构上，晶体管区域和布置在电容器区域中的第一类型掺杂阱。 导体包括设置在第一型掺杂阱上的电容器部分，设置在晶体管区域上的晶体管部分，设置在晶体管区域侧的隔离结构上的第一边缘， 型掺杂井。 两个第一离子掺杂阱设置在晶体管区域中并分别设置在晶体管部分的两侧，并且构成具有晶体管部分的晶体管。 第二离子掺杂区域设置在不包括导体的电容器区域中，并且与电容器部分构成电容器。

    Layout structure of non-volatile memory device
    6.
    发明授权
    Layout structure of non-volatile memory device 有权
    非易失性存储器件的布局结构

    公开(公告)号：US08362535B2

    公开(公告)日：2013-01-29

    申请号：US12568953

    申请日：2009-09-29

    申请人： Hung-Lin Shih ,  Jr-Bin Chen ,  Pei-Ching Yin ,  Hui-Fang Tsai

    发明人： Hung-Lin Shih ,  Jr-Bin Chen ,  Pei-Ching Yin ,  Hui-Fang Tsai

    IPC分类号： H01L27/108 ,  H01L29/66

    CPC分类号： H01L27/0207 ,  H01L27/11519 ,  H01L27/11558 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory cell includes a semiconductor substrate with isolation structures formed therein and thereby transistor region and capacitor region are defined therein. A conductor is disposed over the isolation structures, the transistor region and a first-type doped well disposed in the capacitor region. The conductor includes a capacitor portion disposed over the first-type doped well, a transistor portion disposed over the transistor region, a first edge disposed over the isolation structure at a side of the transistor region, and an opposite second edge disposed over the first-type doped well. Two first ion doped wells are disposed in the transistor region and respectively at two sides of the transistor portion, and constitutes a transistor with the transistor portion. A second ion doped region is disposed in the capacitor region excluding the conductor and constitutes a capacitor with the capacitor portion.

    摘要翻译： 非易失性存储单元包括其中形成有隔离结构的半导体衬底，由此在其中限定晶体管区域和电容器区域。 导体设置在隔离结构上，晶体管区域和布置在电容器区域中的第一类型掺杂阱。 导体包括设置在第一型掺杂阱上的电容器部分，设置在晶体管区域上的晶体管部分，设置在晶体管区域侧的隔离结构上的第一边缘， 型掺杂井。 两个第一离子掺杂阱设置在晶体管区域中并分别设置在晶体管部分的两侧，并且构成具有晶体管部分的晶体管。 第二离子掺杂区域设置在不包括导体的电容器区域中，并且与电容器部分构成电容器。