摘要:
A method of manufacturing a photo-catalyst including titanium dioxide and silicon dioxide is provided, wherein titanium dioxide is synthesized by a collosol gelatinization utilizing the water generated by the esterification of acid and alcohol to conduct a reaction of hydrolysis condensation. The silicon dioxide is synthesized by a collosol gelatinization by adding Si(OC2H5)4, n-C4H9OH and water or Si(OC2H5)4, (CH3)Si(OC2H5)3 and water.
摘要翻译:提供了一种制造包括二氧化钛和二氧化硅的光催化剂的方法,其中二氧化钛通过利用由酸和醇的酯化产生的水进行胶体醇凝胶合成,以进行水解缩合反应。 通过加入Si(OC 2 H 5)4,n-C 4 H 9 OH和水或Si(OC 2 H 5)4,(CH 3)Si(OC 2 H 5)3和水),通过胶体醇化来合成二氧化硅。
摘要:
A handlebar end cap for a bicycle contains: a body, a retaining member, and a cover. The body includes a hole, at least one end face, and a fixing groove with a second inner diameter. The hole has a first inner diameter, and the body further includes a slot. The retaining member includes a recess and a first outer diameter, the first outer diameter has a circular locking loop, and the locking loop has a second outer diameter. The retaining member further includes a positioning rib and a limiting notch, the positioning rib has a third inner diameter, and the limiting notch has a fourth inner diameter. The cover includes a covering face, and the cover includes a first locating trench and a defining portion, wherein the first locating trench has a third outer diameter, the defining portion has a fourth outer diameter.
摘要:
A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.
摘要:
A three-dimensional interconnect interposer adapted for use in system in package (SIP) includes a wafer, at least an embedded passive device and at least an interconnect pattern disposed on the front surface of the wafer, a plurality of cavities exposing the inner contact pads of the interconnect pattern formed on the back surface of the wafer, and a back connect pattern disposed on the back surface of the wafer electrically connected to the interconnect pattern and the embedded passive device through the inner contact pads.
摘要:
A handlebar end cap for a bicycle contains: a body, a retaining member, and a cover. The body includes a hole, at least one end face, and a fixing groove with a second inner diameter. The hole has a first inner diameter, and the body further includes a slot. The retaining member includes a recess and a first outer diameter, the first outer diameter has a circular locking loop, and the locking loop has a second outer diameter. The retaining member further includes a positioning rib and a limiting notch, the positioning rib has a third inner diameter, and the limiting notch has a fourth inner diameter. The cover includes a covering face, and the cover includes a first locating trench and a defining portion. The first locating trench has a third outer diameter, and the defining portion has a fourth outer diameter.
摘要:
A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.
摘要:
A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.
摘要:
A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.
摘要:
A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.
摘要:
A device wafer including a plurality of devices and a plurality of contact pads positioned on a top surface of the device wafer and electrically connected to the devices is provided. Subsequently, a cap wafer is provided. Following that, a plurality of bonding patterns and a plurality of cavity patterns are formed on a bottom surface of the cap wafer. Thereafter, the top surface of the device wafer and the bottom surface of the cap wafer are bonded together with the bonding patterns, wherein the cavity patterns are aligned to the contact pads.