METHOD OF COMPRESSING DATA AND DEVICE FOR PERFORMING THE SAME
    1.
    发明申请
    METHOD OF COMPRESSING DATA AND DEVICE FOR PERFORMING THE SAME 有权
    压缩数据的方法和用于执行该数据的装置

    公开(公告)号:US20140189279A1

    公开(公告)日:2014-07-03

    申请号:US14135628

    申请日:2013-12-20

    IPC分类号: G06F3/06

    摘要: A data compression method includes receiving an input data stream including a previous data block and a current data block, and executing a first comparison of a part of the previous data block with part of a previous reference data block, and a second comparison of the current data block with a current reference data block, where the first and second comparisons are executed in parallel. The method further includes selectively, based on results of the first and second comparisons, outputting the current data block or compressing an extended data block, where the extended data block includes the part of the previous data block and the current data block.

    摘要翻译: 数据压缩方法包括接收包括先前数据块和当前数据块的输入数据流,并且执行先前数据块的一部分与先前参考数据块的一部分的第一比较,以及当前 具有当前参考数据块的数据块,其中第一和第二比较并行执行。 该方法还包括基于第一和第二比较的结果选择性地输出当前数据块或压缩扩展数据块,其中扩展数据块包括先前数据块的一部分和当前数据块。

    NON-VOLATILE RANDOM ACCESS MEMORY DEVICE AND DATA READ METHOD THEREOF
    5.
    发明申请
    NON-VOLATILE RANDOM ACCESS MEMORY DEVICE AND DATA READ METHOD THEREOF 有权
    非易失性随机访问存储器件及其数据读取方法

    公开(公告)号:US20140185361A1

    公开(公告)日:2014-07-03

    申请号:US14141609

    申请日:2013-12-27

    IPC分类号: G11C13/00

    摘要: A nonvolatile random access memory device includes a plurality of memory cells configured to store data therein, a plurality of reference cells separate from the memory cells, the reference cells each configured to output a corresponding reference cell signal, and a read/write circuit. The read/write circuit is configured to generate from the reference cell signals a reference signal which is variable to have a plurality of different reference levels. The read/write circuit is further configured to identify, in response to the reference signal, a logic state among a first logic state and a second logic state for each of one or more selected memory cells, and to output read data corresponding to the identified logic state.

    摘要翻译: 非易失性随机存取存储器件包括多个存储器单元,其被配置为在其中存储数据,多个参考单元与存储器单元分离,每个参考单元被配置为输出相应的参考单元信号,以及读/写电路。 读/写电路被配置为从参考单元信号产生可变为具有多个不同参考电平的参考信号。 读/写电路还被配置为响应于参考信号识别一个或多个所选择的存储器单元中的每一个的第一逻辑状态和第二逻辑状态之间的逻辑状态,并且输出与所识别的对应的读取数据 逻辑状态。

    MEMORY SYSTEM COMPRISING NONVOLATILE MEMORY DEVICE AND RELATED READ METHOD
    6.
    发明申请
    MEMORY SYSTEM COMPRISING NONVOLATILE MEMORY DEVICE AND RELATED READ METHOD 有权
    包含非易失性存储器件的存储器系统及相关读取方法

    公开(公告)号:US20140136765A1

    公开(公告)日:2014-05-15

    申请号:US14076299

    申请日:2013-11-11

    IPC分类号: G06F12/02

    摘要: A method of operating a nonvolatile memory device configured to erase a memory block in sub-block units comprises detecting state information of unselected sub-blocks associated with a selected sub-block comprising selected memory cells, adjusting a read bias of the selected memory cells based on the state information, and reading data from the selected memory cells according to the adjusted read bias. The state information indicates a number of the unselected sub-blocks having a programmed state or an erased state.

    摘要翻译: 一种操作配置成以子块为单位擦除存储器块的非易失性存储器件的方法包括:检测与包括所选存储器单元的所选子块相关联的未选择子块的状态信息,基于所选存储器单元的读偏置 在状态信息上,以及根据所调整的读取偏差从所选存储单元读取数据。 状态信息指示具有编程状态或擦除状态的未选择子块的数量。

    OPERATING METHOD OF MEMORY CONTROLLER AND NONVOLATILE MEMORY DEVICE
    7.
    发明申请
    OPERATING METHOD OF MEMORY CONTROLLER AND NONVOLATILE MEMORY DEVICE 有权
    存储器控制器和非易失性存储器件的操作方法

    公开(公告)号:US20160034349A1

    公开(公告)日:2016-02-04

    申请号:US14713568

    申请日:2015-05-15

    IPC分类号: G06F11/10 G11C29/52

    摘要: A method of operating a nonvolatile memory device including a plurality of memory cells is provided. A default read operation is performed on a page using a default read voltage set to generate default raw data. If error bits of the default raw data are not corrected, a plurality of low-level read operations is performed on the page using a plurality of read voltage sets to generate a plurality of low-level raw data. Each read voltage set is different from the default voltage set. A read voltage set is selected from the plurality of read voltage sets as a starting voltage set, according to each low-level raw data. A high-level read operation using the selected starting voltage set is performed on the page to generate high-level raw data.

    摘要翻译: 提供一种操作包括多个存储单元的非易失性存储器件的方法。 在使用默认读取电压设置的页面上执行默认读取操作以生成默认原始数据。 如果默认原始数据的错误位未被校正,则使用多个读取电压组在页面上执行多个低级读取操作,以生成多个低级原始数据。 每个读取电压设置与默认电压设置不同。 根据每个低级原始数据,从多个读取电压组中选择读取电压设置作为起始电压组。 在页面上执行使用所选择的启动电压设置的高电平读取操作,以生成高级原始数据。

    NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL ARRAY WITH UPPER AND LOWER WORD LINE GROUPS
    8.
    发明申请
    NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL ARRAY WITH UPPER AND LOWER WORD LINE GROUPS 有权
    非易失性存储器件,其中包含上,下字线组的存储单元阵列

    公开(公告)号:US20120268988A1

    公开(公告)日:2012-10-25

    申请号:US13413118

    申请日:2012-03-06

    IPC分类号: G11C16/10 G11C16/04

    摘要: A nonvolatile memory device includes a memory cell array having multiple memory blocks. Each memory block includes memory cells arranged at intersections of multiple word lines and multiple bit lines. At least one word line of the multiple word lines is included in an upper word line group and at least one other word line of the multiple word lines is included in a lower word line group. The number of data bits stored in memory cells connected to the at least one word line included in the upper word line group is different from the number of data bits stored in memory cells connected to the at least one other word line included in the lower word line group.

    摘要翻译: 非易失性存储器件包括具有多个存储块的存储单元阵列。 每个存储块包括布置在多个字线和多个位线的交点处的存储器单元。 多个字线的至少一个字线被包括在上部字线组中,并且多个字线的至少一个其它字线被包括在下部字线组中。 连接到包括在上部字线组中的至少一个字线的存储器单元中存储的数据位的数量不同于存储在连接到包含在下一个字中的至少一个其它字线的存储器单元中的数据位的数量 线组。

    MEMORY SYSTEM CONTROLLER HAVING SEED CONTROLLER USING MULTIPLE PARAMETERS
    10.
    发明申请
    MEMORY SYSTEM CONTROLLER HAVING SEED CONTROLLER USING MULTIPLE PARAMETERS 有权
    具有多个参数的种子控制器的存储器系统控制器

    公开(公告)号:US20130173989A1

    公开(公告)日:2013-07-04

    申请号:US13616168

    申请日:2012-09-14

    IPC分类号: H03M13/05

    摘要: In a memory system, a memory controller includes a randomizer and a seed controller. The seed controller provides a seed to the randomizer and includes; a first register block performing a first cyclic shift operation using a first parameter related to the nonvolatile memory device, a second register block performing a second cyclic shift operation using a second parameter related to the nonvolatile memory device, and a seed generating block generating the seed from the first and second cyclic shift results.

    摘要翻译: 在存储器系统中,存储器控制器包括随机化器和种子控制器。 种子控制器为随机发生器提供一个种子,包括: 使用与非易失性存储器件相关的第一参数执行第一循环移位操作的第一寄存器块,使用与非易失性存储器件相关的第二参数执行第二循环移位操作的第二寄存器块,以及生成种子的种子生成块 从第一和第二循环移位结果。