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1.发明授权Method and apparatus for remotely increasing available processing time at a wireless device while maintaining response delay time 有权用于在保持响应延迟时间的同时在无线设备上远程增加可用处理时间的方法和装置公开(公告)号：US09231737B1
公开(公告)日：2016-01-05
申请号：US14032694
申请日：2013-09-20
发明人： Weishi Feng , Peter Loc
IPC分类号： H04L1/16
CPC分类号： H04L1/1692 , H04W74/02
摘要： A first wireless device includes a coding module that encodes packets and adds dummy data to a second packet. A first receiver (i) in response to transmission of a first packet, receives a first acknowledgement (ACK) signal, and (ii) in response to transmission of the second packet, receives a second ACK signal. Reception of the first ACK signal is delayed a first delay period from an end of the transmission of the first packet. Reception of the second ACK signal is delayed a second delay period from an end of the transmission of the dummy data. The coding module, prior to the transmission of the second packet and based on time to process the first and second packets at a second wireless device, determines the amount of dummy data to add to the second packet such that the first delay period is a same length as the second delay period.
摘要翻译： 第一无线设备包括对分组进行编码并将虚拟数据添加到第二分组的编码模块。 第一接收机（i）响应于第一分组的传输，接收第一确认（ACK）信号，以及（ii）响应于第二分组的传输，接收第二ACK信号。 第一ACK信号的接收从第一分组的传输结束延迟第一延迟时段。 第二ACK信号的接收从虚拟数据的发送结束延迟第二延迟期间。 编码模块在发送第二分组之前并且基于在第二无线设备处理第一和第二分组的时间来确定要添加到第二分组的伪数据的量，使得第一延迟周期是相同的 长度作为第二延迟期。
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公开(公告)号：US09432057B1
公开(公告)日：2016-08-30
申请号：US14140125
申请日：2013-12-24
发明人： Weishi Feng
CPC分类号： H03M13/151 , H03M13/1515 , H03M13/158 , H03M13/611 , H03M13/6502 , H03M13/6561
摘要： A method includes generating a first subset of codeword symbols by processing, during each of a plurality of iterations, a first input and a second input. The first input is a function of (i) an output, during a respective one of the plurality of iterations, of a last processing stage of a first plurality of processing stages and (ii) a symbol, of a first subset of original symbols, corresponding to the respective iteration. The second input is a function of (i) an output, during the respective iteration, of a last processing stage of the second plurality of processing stages and (ii) a symbol, of a second subset of original symbols, corresponding to the respective iteration. The method also includes generating a second subset of codeword symbols by processing, during each of the plurality of iterations, the first input and the second input.
摘要翻译： 一种方法包括通过在多个迭代中的每一个期间处理第一输入和第二输入来生成码字符号的第一子集。 第一输入是（i）在多个迭代中的相应一个迭代期间，在第一多个处理阶段的最后一个处理阶段和（ii）原始符号的第一子集的符号的输出， 对应于各自的迭代。 第二输入是（i）在相应迭代期间在第二多个处理阶段的最后处理阶段的输出和（ii）对应于相应迭代的原始符号的第二子集的符号的函数 。 该方法还包括通过在多个迭代中的每一个期间处理第一输入和第二输入来生成码字符号的第二子集。
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3.发明授权Method and integrated circuit for loading and executing firmware based on programing of one-time programmable memory 有权基于一次性可编程存储器编程的加载和执行固件的方法和集成电路公开(公告)号：US08751786B1
公开(公告)日：2014-06-10
申请号：US14028819
申请日：2013-09-17
发明人： Weishi Feng , Marcus Carlson , Pantas Sutardja , Bin Ni
IPC分类号： G06F9/00 , G06F9/24 , G06F15/177
CPC分类号： H04L9/0897 , G06F21/575 , H04L9/3247 , H04L2209/603 , H04L2209/84
摘要： An integrated circuit includes a first memory, a second memory, a processor, and a descrambler. The first memory is configured to store a key. The first memory is a one-time-programmable memory. The processor is configured to: determine whether the first memory has been programmed; and in response to the first memory not having been programmed, (i) load firmware from a third memory into the second memory, and (ii) execute the firmware. The third memory is separate from the integrated circuit. The processor is also configured to, in response to the first memory having been programmed, load the firmware from the third memory into the second memory. The descrambler is configured to, in response to the first memory having been programmed, descramble the firmware based on the key.
摘要翻译： 集成电路包括第一存储器，第二存储器，处理器和解扰器。 第一个内存配置为存储一个密钥。 第一个存储器是一次性可编程存储器。 处理器被配置为：确定第一存储器是否已被编程; 并且响应于第一存储器未被编程，（i）将固件从第三存储器加载到第二存储器中，以及（ii）执行固件。 第三个存储器与集成电路分开。 处理器还被配置为响应于已经被编程的第一存储器将固件从第三存储器加载到第二存储器中。 解扰器被配置为响应于已经被编程的第一存储器，基于密钥解密固件。
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4.发明授权Secure methods for generating content and operating a drive based on identification of a system on chip 有权基于片上系统的识别来生成内容和操作驱动器的安全方法公开(公告)号：US09009497B1
公开(公告)日：2015-04-14
申请号：US14159505
申请日：2014-01-21
发明人： Weishi Feng
IPC分类号： G06F12/14
CPC分类号： G06F12/1408 , G06F21/10 , G06F21/80 , G06F2221/0737 , G06F2221/2137
摘要： A method of operating a system on chip. The system on chip includes a controller. The method includes: receiving, at the system on chip and in a storage drive, encrypted content and an encrypted content key; storing the encrypted content and the encrypted content key in a storage device; and transmitting the encrypted content key from the controller to a first decryption module. The method further includes: decrypting the encrypted content key to generate a content key based on an identification of the system on chip; transmitting the encrypted content from the controller to a second decryption module; and decrypting the encrypted content based on the content key to generate content.
摘要翻译： 一种操作片上系统的方法。 片上系统包括一个控制器。 该方法包括：在片上系统和存储驱动器中接收加密内容和加密内容密钥; 将加密内容和加密的内容密钥存储在存储设备中; 以及将加密的内容密钥从控制器发送到第一解密模块。 该方法还包括：基于片上系统的识别，解密加密的内容密钥以生成内容密钥; 将所述加密内容从所述控制器发送到第二解密模块; 以及基于所述内容密钥解密所述加密内容以生成内容。
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5.发明授权Apparatus and method for selecting antennas based on peak-to-average ratios of received signals 有权基于接收信号的峰均比选择天线的装置和方法公开(公告)号：US08964913B1
公开(公告)日：2015-02-24
申请号：US13941996
申请日：2013-07-15
发明人： Weishi Feng , Hsiao Tang , Guorong Hu , Yungping Hsu
CPC分类号： H04B7/0814 , H04B1/707 , H04B7/0808
摘要： A circuit includes a multiplexer, a first measurement device, and a decision device. The multiplexer is configured to receive signals from antennas, where the signals include (i) a first signal received from a first antenna of the antennas, and (ii) a second signal received from a second antenna of the antennas. The first measurement device is configured to (i) determine a first peak-to-average ratio based on the first signal, and (ii) determine a second peak-to-average ratio based on the second signal. The decision device is configured to, based on the first peak-to-average ratio and the second peak-to-average ratio, signal the multiplexer to select one of the antennas.
摘要翻译： 电路包括多路复用器，第一测量装置和判定装置。 多路复用器被配置为从天线接收信号，其中信号包括（i）从天线的第一天线接收的第一信号和（ii）从天线的第二天线接收的第二信号。 第一测量装置被配置为（i）基于第一信号确定第一峰均比，以及（ii）基于第二信号确定第二峰均比。 决定装置被配置为基于第一峰值平均比和第二峰值对平均比率，信号多路复用器来选择天线之一。
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公开(公告)号：US09106323B1
公开(公告)日：2015-08-11
申请号：US14060008
申请日：2013-10-22
发明人： Hsiao-Cheng Tang , Yungping Hsu , Guorong Hu , Weishi Feng
摘要： A network device includes a receiver that receives a first signal on a channel. A demodulator outputs demodulated data based on the first signal. A gain device, based on a change in a gain of the first signal, generates a second signal. A validating device determines whether the first signal is a valid direct sequence spread spectrum signal and based on whether the first signal is a valid direct sequence spread spectrum signal, generates a third signal. An assessment device: determines whether the demodulated data includes a predetermined header, where the predetermined header includes a predetermined sequence; determines whether the channel is busy based on the second signal, the third signal, and whether the demodulated data includes the predetermined header with the predetermined sequence; and generates a channel signal indicating whether the channel is busy. A transmitter, based on the channel signal, transmits a fourth signal on the channel.
摘要翻译： 网络设备包括在信道上接收第一信号的接收机。 解调器基于第一信号输出解调数据。 增益装置基于第一信号的增益的变化产生第二信号。 验证装置确定第一信号是否是有效的直接序列扩频信号，并且基于第一信号是否是有效的直接序列扩频信号，产生第三信号。 评估装置：确定解调数据是否包括预定报头，其中预定报头包括预定序列; 基于第二信号，第三信号以及解调数据是否包括具有预定序列的预定报头来确定信道是否忙碌; 并产生指示信道是否正忙的信道信号。 基于信道信号的发射机在信道上发送第四信号。
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7.发明授权公开(公告)号：US08539216B1
公开(公告)日：2013-09-17
申请号：US13647045
申请日：2012-10-08
发明人： Weishi Feng , Marcus Carlson , Pantas Sutardja , Bin Ni
IPC分类号： G06F9/00 , G06F9/24 , G06F15/177
CPC分类号： H04L9/0897 , G06F21/575 , H04L9/3247 , H04L2209/603 , H04L2209/84
摘要： A system-on-a-chip including a first one-time-programmable memory, a second memory, a test interface, an input circuit, and a processor. The input circuit is configured to receive data transmitted from a third memory to the system-on-a-chip. The processor is configured to, while booting up the system-on-a-chip, determine whether a first one-time-programmable memory has been previously programmed. The processor is also configured to (i) in response to the first one-time-programmable memory not having been previously programmed, enable the test interface for debugging of the system-on-a-chip, (ii) based on the first one-time-programmable memory having been previously programmed, disable the test interface, and (iii) subsequent to one of the enabling of the test interface and the disabling of the test interface, load the data from the third memory into the second memory.
摘要翻译： 一种片上系统，包括第一一次可编程存储器，第二存储器，测试接口，输入电路和处理器。 输入电路被配置为接收从第三存储器传送到片上系统的数据。 处理器被配置为在引导片上系统的同时确定是否先前编程了第一个一次性可编程存储器。 处理器还被配置为（i）响应于先前已经被编程的第一个一次性可编程存储器，启用测试接口来调试片上系统，（ii）基于第一个 时间可编程存储器已经被预先编程，禁用测试接口，以及（iii）在测试接口的启用和禁用测试接口之一之后，将数据从第三存储器加载到第二存储器中。
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