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    Self aligned fin-type programmable memory cell
    1.
    发明授权
    Self aligned fin-type programmable memory cell 有权

    公开(公告)号：US08853047B2

    公开(公告)日：2014-10-07

    申请号：US14281192

    申请日：2014-05-19

    Applicant: Macronix International Co., Ltd.

    Inventor： Hsiang-Lan Lung ,  Matthew J. Breitwisch ,  Chung Hon Lam

    IPC: H01L45/00 ,  H01L21/20 ,  H01L27/24

    CPC classification number: H01L45/1666 ,  H01L27/2409 ,  H01L27/2454 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/124 ,  H01L45/142 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1691

    Abstract: A fin-type programmable memory cell includes a bottom electrode electrically coupled to an access device, a top electrode, and an L-shaped memory material element electrically coupled to the bottom and top electrodes. A memory array includes an array of such memory cells, electrically coupled to an array of access devices. Method for making a memory cell, includes: forming a dielectric support layer over a bottom electrode, the dielectric support layer having an upper surface; forming a cavity through the dielectric support layer, exposing a surface of the bottom electrode and defining a dielectric support structure having a sidewall; forming a film of memory material over the dielectric support structure and in the cavity; depositing a dielectric spacer layer over the memory material film; forming a dielectric sidewall spacer from the dielectric spacer layer and a memory material structure having a generally horizontal portion underlying the dielectric sidewall spacer and a generally vertical portion between the dielectric sidewall spacer and the sidewall of the dielectric support structure; forming a dielectric fill; planarizing the dielectric fill to expose upper ends of the vertical portion of the memory material structure; depositing a top electrode material over the planarized dielectric fill; and forming a top electrode from the top electrode material and a memory material element from the memory material structure.

    Phase change memory cell having vertical channel access transistor
    4.
    发明授权
    Phase change memory cell having vertical channel access transistor 有权
    具有垂直沟道存取晶体管的相变存储单元

    公开(公告)号：US08624236B2

    公开(公告)日：2014-01-07

    申请号：US13670337

    申请日：2012-11-06

    Applicant: Macronix International Co., Ltd. ,  International Business Machines Corporation

    Inventor： Hsiang-Lan Lung ,  Chung Hon Lam

    IPC: H01L21/00

    CPC classification number: H01L27/101 ,  G11C13/0004 ,  H01L27/2454 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/142 ,  H01L45/144 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1675 ,  H01L45/1683

    Abstract: A device includes a substrate having a first region and a second region. The first region comprises a first field effect transistor having a horizontal channel region within the substrate, a gate overlying the horizontal channel region, and a first dielectric covering the gate of the first field effect transistor. The second region of the substrate includes a second field effect transistor comprising a first terminal extending through the first dielectric to contact the substrate, a second terminal overlying the first terminal and having a top surface, and a vertical channel region separating the first and second terminals. The second field effect transistor also includes a gate on the first dielectric and adjacent the vertical channel region, the gate having a top surface that is co-planar with the top surface of the second terminal.

    Abstract translation: 一种器件包括具有第一区域和第二区域的衬底。 第一区域包括在衬底内具有水平沟道区的第一场效应晶体管，覆盖在水平沟道区上的栅极和覆盖第一场效应晶体管的栅极的第一电介质。 衬底的第二区域包括第二场效应晶体管，其包括延伸穿过第一电介质以接触衬底的第一端子，覆盖第一端子并具有顶表面的第二端子和分离第一和第二端子的垂直沟道区域 。 第二场效应晶体管还包括在第一电介质上并且与垂直沟道区相邻的栅极，栅极具有与第二端子的顶表面共面的顶表面。

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